KK74HC4051A Datasheet, PDF (2/9 Pages) KODENSHI KOREA CORP. – Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

KK74HC4051A
MAXIMUM RATINGS^*
Symbol
Parameter
Value
Unit
V_CC Positive DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
(Referenced to V_EE)
-0.5 to +14.0
V_EE Negative DC Supply Voltage (Referenced to GND)
-7.0 to +0.5
V
V_IS Analog Input Voltage
V_EE - 0.5 to V_CC+0.5
V
V_IN Digital Input Voltage (Referenced to GND)
-1.5 to V_CC +1.5
V
I
DC Input Current Into or Out of Any Pin
±25
mA
P_D Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
mW
500
Tstg Storage Temperature
-65 to +150
°C
T_L
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
(Plastic DIP or SOIC Package)
*_{Maximum Ratings are those values beyond which damage to the device may occur.}
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Max Unit
V_CC
Positive Supply Voltage (Referenced to GND)
(Referenced to V_EE)
V_EE
Negative DC Supply Voltage (Referenced to GND)
V_IS
Analog Input Voltage
V_IN
Digital Input Voltage (Referenced to GND)
V_IO*
Static or Dynamic Voltage Across Switch
T_A
Operating Temperature, All Package Types
2.0 6.0
V
2.0 12.0
- 6.0 GND V
V_EE
V_CC
V
GND V_CC
V
-
1.2
V
-55 +125 °C
t_r, t_f
Input Rise and Fall Time (Channel Select V_CC =2.0 V
0 1000 ns
or Enable Inputs)
V_CC =4.5 V
0
500
V_CC =6.0 V
0
400
* _{For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may be drawn;}
i. e., the current out of the switch may contain both V_CC and switch input components. The reliability of the device
will be unaffected unless the Maximum Ratings are exceeded.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V_IN and V_OUT should be constrained to the range indicated in the
Recommended Operating Conditions..
Unused digital input pins must always be tied to an appropriate logic voltage level (e.g., either GND or V_CC).
Unused Analog I/O pins may be left open or terminated.
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