KK4001B Datasheet, PDF (2/5 Pages) KODENSHI KOREA CORP. – Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS

KK4001B
MAXIMUM RATINGS^*
Symbol
Parameter
Value
Unit
V_CC DC Supply Voltage (Referenced to GND)
V_IN DC Input Voltage (Referenced to GND)
I_IN
DC Input Current, per Pin
P_D Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
-0.5 to +20
V
-0.5 to V_CC +0.5
V
±10
mA
500
mW
500
Ptot Power Dissipation per Output Transistor
100
mW
Tstg Storage Temperature
-65 to +150
°C
T_L
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
(Plastic DIP or SOIC Package)
*_{Maximum Ratings are those values beyond which damage to the device may occur.}
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 12 mW/°C from 100° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V_CC
V_IN, V_OUT
T_A
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min Max Unit
3.0
18
V
0
V_CC
V
-55 +125
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V_IN and V_OUT should be constrained to the range GND≤(V_IN or
V_OUT)≤V_CC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V_CC). Unused
outputs must be left open.
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