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KK74HCT273A Datasheet, PDF (1/6 Pages) KODENSHI KOREA CORP. – Octal D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS
TECHNICAL DATA
Octal D Flip-Flop with
Common Clock and Reset
High-Performance Silicon-Gate CMOS
KK74HCT273A
The KK74HCT273A is identical in pinout to the LS/ALS273.
The KK74HCT273A may be used as a level converter for interfacing
TTL or NMOS outputs to High-Speed CMOS inputs.
This device consists of eight D flip-flops with common Clock and
Reset inputs. Each flip-flop is loaded with a low-to-high transition of the
Clock input. Reset is asynchronous and active low.
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
ORDERING INFORMATION
KK74HCT273AN Plastic
KK74HCT273ADW SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 20=VCC
PIN 10 = GND
FUNCTION TABLE
Inputs
Reset Clock
D
L
X
X
H
H
H
L
H
L
X
H
X
X = don’t care
Output
Q
L
H
L
no change
no change
1