KK74HC574A Datasheet, PDF (1/6 Pages) KODENSHI KOREA CORP. – Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS

TECHNICAL DATA
Octal 3-State
Noninverting D Flip-Flop
High-Performance Silicon-Gate CMOS
The KK74HC574A is identical in pinout to the LS/ALS574. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
Data meeting the setup time is clocked to the outputs with the rising
edge of the Clock. The OE input does not affect the states of the flip-flops,
but when OE is high, all device outputs are forced to the high-impedance
state; thus, data may be stored even when the outputs are not enabled.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
KK74HC574A
N SUFFIX
PLASTIC DIP
20
1
20
1
DW SUFFIX
SOIC
ORDERING INFORMATION
KK74HC574AN
Plastic DIP
KK74HC574ADW SOIC
T_A = -55° to 125° C for all packages
LOGIC DIAGRAM
DATA
INPUTS
D0 ²
D1 ³
D2 ⁴
D3 ⁵
D4 ⁶
D5 ⁷
D6 ⁸
D7 ⁹
CLOCK ¹¹
1
OE
19 _Q0
18 _Q1
17 _Q2
16 _Q3
15 _Q4
14 _Q5
13 _Q6
12 _Q7
PIN 20=V_CC
PIN 10 = GND
NONINVERTING
OUTPUTS
PIN ASSIGNMENT
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 V _CC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CLOCK
FUNCTION TABLE
Inputs
OE
Clock
Output
D
Q
L
L
L L,H,
H
X
H= high level
L = low level
X = don’t care
Z = high impedance
H
H
L
L
X
no
change
X
Z
1