KK74HC4046A Datasheet, PDF (1/12 Pages) KODENSHI KOREA CORP. – Phase-Locked Loop High-Performance Silicon-Gate CMOS

TECHNICAL DATA
Phase-Locked Loop
High-Performance Silicon-Gate CMOS
KK74HC4046A
The device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
The KK74HC4046A phase-locked loop contains three phase
comparators, a voltage-controlled oscillator (VCO) and unity gain op-
amp DEM_OUT. The comparators have two common signal inputs,
COMP_IN, and SIG_IN. Input SIG_IN and COMP_IN can be used directly
coupled to large voltage signals, or indirectly coupled (with a series
capacitor to small voltage signals). The self-bias circuit adjusts small
voltage signals in the linear region of the amplifier. Phase comparator 1
(an exclusive OR gate) provides a digital error signal PC1_OUT and
maintains 90 degrees phase shift at the center frequency between SIG_IN
and COMP_IN signals (both at 50% duty cycle). Phase comparator 2 (with ORDERING INFORMATION
leading-edge sensing logic) provides digital error signals PC2_OUT and
KK74HC4046AN Plastic
PCP_OUT and maintains a 0 degree phase shift between SIG_IN and COMP_IN
KK74HC4046AD SOIC
signals (duty cycle is immaterial). The linear VCO produces an output _{TA = -55° to 125° C for all packages}
signal VCO_OUT whose frequency is determined by the voltage of input
VCO_IN signal and the capacitor and resistors connected to pins C1A,
C1B, R1 and R2. The unity gain op-amp output DEM_OUT with an external
resistor is used where the VCO_IN signal is needed but no loading can be tolerated. The inhibit input, when high,
disables the VCO and all on-amps to minimize standby power consumption.
Applications include FM and FSK modulation and demodulation, frequency synthesis and multiplication,
frequency discrimination, tone decoding, data synchronization and conditioning, voltage-to-frequency conversion and
motor speed control.
• Low Power Consumption Characteristic of CMOS Device
• Operating Speeds Similary to LS/ALSTTL
PIN ASSIGNMENT
• Wide Operating Voltage Range: 3.0 to 6.0 V
• Low Input Current: 1.0 µA Maximum (except SIG_IN and COMP_IN)
• Low Quiescent Current: 80 µA Maximum (VCO disabled)
• High Noise Immunity Characteristic of CMOS Devices
• Diode Protection on all Inputs
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
PCP_OUT
PC1_OUT
COMP_IN
VCO_OUT
INH
C1A
C1B
GND
VCO_IN
DEM_OUT
R1
R2
PC2_OUT
SIG_IN
PC3_OUT
V_CC
Name and Function
Phase Comparator Pulse Output
Phase Comparator 1 Output
Comparator Input
VCO Output
Inhibit Input
Capacitor C1 Connection A
Capacitor C1 Connection B
Ground (0 V) V_SS
VCO Input
Demodulator Output
Resistor R1 Connection
Resistor R2 Connection
Phase Comparator 2 Output
Signal Input
Phase Comparator 3 Output
Positive Supply Voltage
1