KK74ACT273 Datasheet, PDF (1/6 Pages) KODENSHI KOREA CORP. – Octal D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS

TECHNICAL DATA
Octal D Flip-Flop with
Common Clock and Reset
High-Speed Silicon-Gate CMOS
KK74ACT273
The KK74ACT273 is identical in pinout to the LS/ALS273,
HC/HCT273. The KK74ACT273 may be used as a level converter for
interfacing TTL or NMOS outputs to High Speed CMOS inputs.
This device consists of eight D flip-flops with common Clock and
Reset inputs. Each flip-flop is loaded with a low-to-high transition of the
Clock input. Reset is asynchronous and active low.
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• Outputs Source/Sink 24 mA
ORDERING INFORMATION
KK74ACT273N Plastic
KK74ACT273DW SOIC
T_A = -40° to 85° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 20=V_CC
PIN 10 = GND
FUNCTION TABLE
Inputs
Reset Clock
D
L
X
X
H
H
H
L
H
L
X
H
X
X = don’t care
Output
Q
L
H
L
no change
no change
1