KK4052B Datasheet, PDF (1/7 Pages) KODENSHI KOREA CORP. – Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

TECHNICAL DATA
KK4052B
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The KK4052B analog multiplexer/demultiplexer is digitally controlled
analog switches having low ON impedance and very low OFF leakage
current. Control of analog signals up to 20V peak-to-peak can be
achieved by digital signal amplitudes of 4.5 to 20V (if V_CC - GND = 3V,
a V_CC - V_EE of up to 13 V can be controlled; for V_CC - V_EE level
differences above 13V a V_CC - GND of at least 4.5V is required).
These multiplexer circuits dissipate extremely low quiescent power
over the full V_CC -GND and V_CC - V_EE supply-voltage ranges,
independent of the logic state of the control signals. When a logic “1”is
present at the ENABLE input terminal all channels are off.
The IW4052 is a differential 4-channel multiplexer having two binary
control inputs. A and B, and an enable input. The two binary input signals
select 1 of 4 pairs of channels to turned on and connect the analog inputs
to the outputs.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1µA at 18 V over full package-temperature
• range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
N SUFFIX
PLASTIC
16
1
D SUFFIX
16
SOIC
1
ORDERING INFORMATION
KK4052BN
Plastic DIP
KK4052BD
SOIC
T_A = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
Double-Pole, 4-Position
Plus Common Off
PIN 16 =V_CC
PIN 7 = V_EE
PIN 8 = GND
FUNCTION TABLE
Control Inputs
Enable
Select
B
A
L
L
L
L
L
H
L
H
L
L
H
H
H
X
X
H = high level
L = low level
X = don’t care
ON
Channels
Y0 X0
Y1 X1
Y2 X2
Y3 X3
None
1