W1461BP Datasheet, PDF (5/9 Pages) Keysight Technologies – Keysight EEsof EDA SystemVue

05 | Keysight | SystemVue 2016 - Technical Overview
SystemVue Design Kits and Application Personalities
Application personalities and design kits can be added to SystemVue to accomplish deeper analysis and/or implementation tasks, for
both RF system architectures and digital hardware design. They can be added to any SystemVue environment.
W1711EP/ET
SystemVue Engine
W1712EP/ET
SystemVue Distributed Computing
8-pack
W1713EP/ET
SerDes Models
W1714EP/ET
AMI model generator
W1715EP/ET
MIMO channel builder
W1716EP/ET
Digital pre-distortion builder
W1717EP/ET
Hardware design kit
W1718EP/ET
C++ code generator
W1719EP/ET
RF system design kit
W1720EP/ET
Phased array beamforming kit
Provides 1 additional dataflow simulation engine, on top of the engine already included
with SystemVue environment. Typically used for remote simulations on Windows/Linux
compute clusters; also can be embedded into custom applications using API, such as
instrument signal generation). A “network” license is recommended for use with compute
clusters.
Enables up to 8 concurrent dataflow simulations on distributed simulation clusters.
Provides interface to grid managers such as LSF. (W1711 is recommended, but not
required. Only available in networked licensed configurations.)
Model set that helps gigabit SerDes architects to investigate PHY-level signal processing
for maximum interconnect performance. Includes optical SerDes models.
Includes the gigabit SerDes simulation models of the W1713, and also generates
simulation models compliant with the IBIS AMI standard, for use in channel simulators
throughout the signal integrity community. (Note: Requires W1718).
Models full WINNER-II and 3D WINNER+ channel fading for 4G link-level simulation and
throughput scenarios. Models the 8x8 MIMO arrays needed for LTE Advanced TX and RX,
with importation of 2D antenna patterns for realistic system Throughput simulations that
also account for crosstalk and propagation effects.
Characterizes wideband power amplifiers and mitigates nonlinearities and memory
effects to improve ACLR ≥ 20 dB (typical) for 4G waveforms. Extracts Volterra, Memory
Polynomial, or Look-up Table coefficients, then builds baseband predistortion network.
Includes Crest Factor Reduction (CFR). Integrates with live test equipment, measured
X-parameters, or Keysight ADS/GoldenGate co-simulations.
Provides a hardware design flow option for FPGA rapid prototyping. Includes a fixed-point
library, VHDL/Verilog code-generation, and connects to Altera Quartus Pro II and Xilinx
Vivado/ISE for convenient 1-step code generation & synthesis. Also enables “Hardware-
in-loop” (HIL) co-simulation with Xilinx Virtex 6/7 boards and Keysight M9703A/B
real-time applications.
Generates transportable, license-free C++ models from the SystemVue interface,
connecting your PHY algorithms to implementation and verification tools on other
platforms and OS’s. This option is integrated well with Microsoft Visual C++ 2013.
Adds an RF System design personality. Provides dedicated spectral-domain simulator for
accurate RF architecture studies, and enables bottom-up verification using X-parameters
(ADS) and fast circuit envelope models (GoldenGate). Enables Baseband and System
modelers to take advantage of RF architectures, without deep RF application knowledge.
Adds a phased array/beamforming personality that includes simulation models,
measurements, and plotting for easily designing with hundreds of parallel channels, for
high-order MIMO as well as beamforming. Works with both W1461 Dataflow and W1719
RF System tools. (Note: This module is included in the W1905 Radar and W1906 5G
libraries).