IRFB4019 Datasheet, PDF (6/7 Pages) Kersemi Electronic Co., Ltd. – Key Parameters Optimized for Class-D Audio

IRFB4019PBF
D.U.T
+
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
+
‚
-

R_G
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance
Current Transformer
D.U.T. I_SD Waveform
Reverse
-^„ +
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V_DS Waveform
Diode Recovery
dv/dt
*
• dv/dt controlled by R_G
• Driver same type as D.U.T.
V_DD
Re-Applied
** ^{+ Voltage}
Body Diode Forward Drop
• I_SD controlled by Duty Factor "D"
-
• D.U.T. - Device Under Test
Inductor Curent
Ripple ≤ 5%
* Use P-Channel Driver for P-Channel Measurements
** Reverse Polarity for P-Channel
*** V_GS = 5V for Logic Level Devices
V^*_G^*_S^*=10V
V_DD
I_SD
Fig 16. Diode Reverse Recovery Test Circuit for HEXFET^® Power MOSFETs
V_(BR)DSS
15V
tp
VDS
L
DRIVER
RG
2V0GVS
tp
D.U.T
I_AS
0.01Ω
+
- ^VDD
A
Fig 17a. Unclamped Inductive Test Circuit
I_AS
Fig 17b. Unclamped Inductive Waveforms
L_D
V_DS
+
V_DD -
V_GS
Pulse Width < 1µs
Duty Factor < 0.1%
D.U.T
Fig 18a. Switching Time Test Circuit
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
-V^DS
V_GS
3mA
I_G
I_D
Current Sampling Resistors
Fig 19a. Gate Charge Test Circuit
2014-8-13
6
V_DS
90%
10%
V_GS
t_{d(on) tr}
t_{d(off) tf}
Fig 18b. Switching Time Waveforms
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2 Qgd
Qgodr
Fig 19b Gate Charge Waveform
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