IRLR120N Datasheet, PDF (4/10 Pages) Kersemi Electronic Co., Ltd. – Advanced Process Technology

IRLR/U120N
800
V _GS = 0V,
f = 1MHz
C _iss = C_gs + C _gd , C_ds S HO RTE D
C _rss = C _gd
C _oss = C _ds + C _gd
600
C _{is s}
400
C _oss
200
C _rss
0
A
1
10
100
V _DS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
15
I_D = 6.0A
12
9
V_DS = 80V
V_DS = 50V
V_DS = 20V
6
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
5
10
15
20
25
Q _G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
10
T_J = 175°C
T_J = 25°C
1
0.1
0.4
VGS = 0V _A
0.6
0.8
1.0
1.2
1.4
V_SD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
100
OPERATION IN THIS AREA LIMITED
BY R DS(on)
10µs
10
100µs
1ms
1
10ms
T_C = 25°C
T_J = 175°C
S ingle P ulse
0.1
1
10
100
V_DS , Drain-to-Source Voltage (V)
A
1000
Fig 8. Maximum Safe Operating Area
2014-8-24
4
www.kersemi.com