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KSMU1P50 Datasheet, PDF (1/8 Pages) Kersemi Electronic Co., Ltd. – 500V P-Channel MOSFET
Features
• -1.2A, -500V, RDS(on) = 10.5Ω @VGS = -10 V
• Low gate charge ( typical 11 nC)
• Low Crss ( typical 6.0 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
KSMD1P50 / KSMU1P50
500V P-Channel MOSFET
TO-252
TO-251
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for electronic lamp ballasts based on the
complementary half bridge topology.
G!
S
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D
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
KSMD1P50 / KSMU1P50
-500
-1.2
-0.76
-4.8
± 30
110
-1.2
3.8
-4.5
2.5
38
0.3
-55 to +150
300
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
Max
--
3.29
--
50
--
110
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
2014-7-8
1
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