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KSMD3N50C Datasheet, PDF (1/8 Pages) Kersemi Electronic Co., Ltd. – 500V N-Channel MOSFET
Features
• 2.5 A, 500 V, RDS(on) = 2.5 Ω @ VGS = 10 V
• Low gate charge ( typical 10 nC )
• Low Crss ( typical 8.5 pF)
• Fast switching
• 100 % avalanche tested
• Improved dv/dt capability
KSMD3N50C/KSMU3N50C
500V N-Channel MOSFET
TO-252
TO-251
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Kersemi proprietary, planar stripe,
DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
ciency switched mode power supplies, active power factor cor-
rection, electronic lamp ballasts based on half bridge topology.
Absolute Maximum Ratings
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient*
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
D
{
G{
●
◀▲
●
●
{
S
KSMD3N50C/KSMU3N50C
500
2.5
1.5
10
± 30
200
2.5
3.5
4.5
35
0.28
-55 to +150
300
Typ
--
--
--
Max
3.5
50
110
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
2014-7-30
1
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