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C0603C475K8PAC7867 Datasheet, PDF (14/21 Pages) Kemet Corporation – Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
T
P2
T2
ØDo
Po
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
E1
Ko
B1
Ao
Bo
F
W
E2
S1
P1
T1
Cover Tape
Center Lines of Cavity
ØD1
B1 is for tape feeder reference only,
including draft concentric about B o.
User Direction of Unreeling
Embossment
For cavity size,
see Note 1 Table 4
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Tape Size
D0
8 mm
12 mm
1.5 +0.10/-0.0
(0.059 +0.004/-0.0)
16 mm
Constant Dimensions — Millimeters (Inches)
D1 Minimum
Note 1
E1
P0
P2
R Reference S1 Minimum
Note 2
Note 3
1.0
(0.039)
25.0
(0.984)
1.5
(0.059)
1.75 ±0.10
4.0 ±0.10
2.0 ±0.05
(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)
30
(1.181)
0.600
(0.024)
T
Maximum
0.600
(0.024)
T1
Maximum
0.100
(0.004)
Tape Size
8 mm
12 mm
16 mm
Pitch
Single (4 mm)
Single (4 mm) &
Double (8 mm)
Triple (12 mm)
B1 Maximum
Note 4
4.35
(0.171)
8.2
(0.323)
12.1
(0.476)
Variable Dimensions — Millimeters (Inches)
E2
Minimum
6.25
(0.246)
F
3.5 ±0.05
(0.138 ±0.002)
P1
4.0 ±0.10
(0.157 ±0.004)
T2
Maximum
2.5
(0.098)
10.25
(0.404)
5.5 ±0.05
8.0 ±0.10
(0.217 ±0.002) (0.315 ±0.004)
4.6
(0.181)
14.25
(0.561)
7.5 ±0.05
12.0 ±0.10
(0.138 ±0.002) (0.157 ±0.004)
4.6
(0.181)
W
Maximum
8.3
(0.327)
12.3
(0.484)
16.3
(0.642)
A0,B0 & K0
Note 5
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6).
3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 1/19/2015 14