PF2015UDF12_15 Datasheet, PDF (1/2 Pages) KEC(Korea Electronics) – ESD/EMI Filter

SEMICONDUCTOR
TECHNICAL DATA
PF2015UDF12
ESD/EMI Filter
APPLICATION
hI/O ESD protection for mobile handsets, notebook, PDAs, etc.
hEMI filtering for data ports in cell phones, PDAs, notebook computers
hEMI filtering for LCD, camera and chip-to-chip data lines
FEATURES
hEMI/RFI filtering
hESD Protection to IEC 61000-4-2 Level 4
hLow insertion loss
hGood attenuation of high frequency signals
hLow clamping voltage
hLow operating and leakage current
hSix elements in one package
DESCRIPTION
PF2015UDF12 is an EMI filter array with electrostatic discharge (ESD) protection,
which integrates six pi filters (C-R-C). These parts include ESD protection diodes on
every pin, providing a very high level of protection for sensitive electronic components
that may be subjected to electrostatic discharge.
The PF2015UDF12 provides the recommended line termination while implementing a
low pass filter to limit EMI levels and providing ESD protection which exceeds IEC
61000-4-2 level 4 standard. The UDFN package is a very effective PCB space
occupation and a very thin package (0.4mm Pitch, 0.5mm height)
MAXIMUM RATING (Ta=25)
CHARACTERISTIC
DC Power Per Resistor
Power Dissipation
Junction Temperature
Storage Temperature
* Total Package Power Dissipation
SYMBOL
P_R
*P_D
T_j
T_stg
EQUIVALENT CIRCUIT
FILTERn*
200Ω
FILTERn*
RATING
100
600
150
-55q150
UNIT
mW


A
Pin 1
TOP VIEW
C
E
1
6
GND PAD
12
D⁷
BOTTOM VIEW
KL
SIDE VIEW
1,12 : Filter channel 1
2,11 : Filter channel 2
3,10 : Filter channel 3
4,9 : Filter channel 4
5,8 : Filter channel 5
6,7 : Filter channel 6
DIM
A
B
C
D
E
F
G
H
J
K
L
MILLIMETERS
2.50
1.20
1.80 +_ 0.10
0.20 +_ 0.05
0.40
0.30 +_ 0.10
0.25 +_ 0.05
0.20 Min
0.50 +_ 0.05
0.125
0.03+0.02/-0.03
UDFN-12
MARKING
Type Name
T8
Lot No.
RECOMMENEDED FOOTPRINT
(dimensions in mm)
1.50
0.40
15pF
15pF
0.30
GND
0.45
ELECTRICAL CHARACTERISTICS (Ta=25)
CHARACTERISTIC
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Cutoff Frequency
Channel Resistance
Line Capacitance
SYMBOL
V_RWM
V_BR
I_R
fc_-3dB
R_LINE
C_LINE
TEST CONDITION
-
I_t=1mA
V_RWM=3.3V
V_Line=0V, Z_SOURCE=50ʃ, Z_LOAD=50ʃ
Between Input and Output
V_Line=0V DC, 1MHz, Between I/O Pins and GND
V_Line=2.5V, 1MHz, Between I/O Pins and GND
MIN.
-
6
-
-
160
36
24
TYP.
-
-
-
100
200
45
30
MAX.
5
-
1.0
-
240
54
36
UNIT
V
V
ǺA
MHz
ʃ
pF
2009. 6. 4
Revision No : 3
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