HE84G762B Datasheet, PDF (36/60 Pages) King blillion Electronics Co.,Ltd. – 8-BIT MICRO-CONTROLLER

KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HE84G762B
HE80004 Series
14. Timer1
The Timer1 consists of two 8-bit write-only preload registers T1H and T1L and 16-bit down counter. If
Timer1 is enabled, the counter will decrement by one with each incoming clock pulse. Timer1 interrupt
will be generated when the counter underflows - counts down to FFFFH. And the counter will be
automatically reloaded with the value of T1H and T1L.
The clock source of Timer1 is derived from slow clock “SCK” at dual clock or slow clock only mode.
And it comes from the fast clock “FCK” at fast clock only mode.
Please note that the interrupt is generated when counter counts from 0000H to FFFFH. If the value of
T1H and T1L is N, and count down to FFFFH, the total count is N+1. The content of counter is zero
when system resets. Once it is enabled to count at this moment, interrupt will be generated immediately
and value of T1H and T1L will be loaded since it counts to FFFFH. So the T1H and T1L value should be
set before enabling Timer1.
The contents of
T1H and T1L are
almost loaded into
Timer1 immediately
when Timer1 is
enabled after reset.
T1H
T1L
< Timer1 Counter >
Decreases 1
Auto reload
when Timer1
is underflow
No
Count To
0xFFFFh
Yes
Timer1
Interrupt
Request
T1_INT
The Timer1 related control registers are list as below:
Register Address
IER 0x02
T1L 0x03
T1H 0x04
OP1 0x09
Field
TC1_IER
T1L[7:0]
T1H[7:0]
TC1E
Bit position Mode
Description
2
R/W
0: TC1 interrupt is disabled. (default)
1: TC1 interrupt is enabled.
7~0
W Low byte of TC1 pre-load value
7~0
W High byte of TC1 pre-load value
2
R/W
0: TC1 is disabled. (default)
1: TC1 is enabled.
June 1, 2004
36
V0.92
This specification is subject to change without notice. Please contact sales person for the latest version before use.