HE83116B Datasheet, PDF (2/9 Pages) King blillion Electronics Co.,Ltd. – 8-BIT MICRO-CONTROLLER

KING BILLION ELECTRONICS CO., LTD
ᗱሹႝηިҽԖज़Ϧљ
HE83116B
HE80000 SERIES
I.F.C.
Ϩʳ
DAO
—
E.S.C. I.P.R
Ϩʳ Ϩʳ
OP PWM
Ϩʳ Ϩʳ
PROM
64KB
LCD
128
DROM TP TP+1 RAM PP DP
— 16-bit Ϩʳ 256B — 8-bit
COM*SEG Bias Rgr ChrgPmp LV2
4*32
1/3 — 1,3/2,3 Ϩʳ
I/O DTMF WDT Timer
16 — Ϩʳ T1,T2
LR LVG REC S.R.
—— — —
D. Pin Description
Pin # Pin name I/O
Function
Description
External fast clock pin. Mask option settingΚ
55 FXI,
54 FXO
B, Connecting to crystal or RC _{MO_FCK/SCKN= 00ǺSlow Clock only}
O to generate 32.768 kHz ~ _{01ǺIllegal}
8MHz frequency.
10ǺDual Clock
11ǺFast Clock only
MO_FOSCE = 0ΚInternal fast osc.
58 SXI,
57 SXO
External slow clock pin.
= 1ΚExternal fast osc.
Connecting with 32768 Hz _{MO_FXTAL= 0ΚRC osc. for fast clock}
I,
O
crystal or resistor as slow _{= 1ΚX’tal osc. for fast clock}
clock and
source for
TIMER1,
providing clock
LCD display,
Time-Base and
MO_SXTAL=
0ΚRC
for 32768 Hz clock
= 1ΚX’tal for 32768
Hz
clock
other internal blocks.
Use OP1 and OP2 to switch among different operation
mode (NORMAL, SLOW, IDEL and SLEEP). In Dual
Clock mode, the main system clock is still the Fast Clock.
The 32768 Hz clock is for LCD and Timer 1 only.
Level trigger, active low. Except for using this pin, using
mask option (MO_PORE=1) could enable IC build-in
53 RSTP_N I System Reset.
power-on reset circuit.
Besides, MO_WDTE can set Watch Dog TimerΚ
MO_WDTE=0ΚDisable Watch Dog Timer
=1ΚEnable Watch Dog Timer
56 TSTP_P I Test Pin
Please bond this pin and add a test point on PCB for
debugging. Leave this pin floating is OK.
Mask optionsΚ
68..71
1..4
PRTC[7:0]
B
8-pin bi-directional I/O ^{MO_CPP[7..0]=1 ~ Push-pull.}
port.
=0 ~ Open-drain.
Output must be “1” before reading whenever use them as
input (No tri-state structure).
8-pin bi-directional I/O Mask optionsΚ
60..67 PRTD[7:0] B
port. PRTD[7..2] as MO_DPP[7..0]=1 ~ Push-pull.
wake-up pin.
=0 ~ Open-drain.
PRTD[7..6] as external Output must be “1” before reading whenever use them as
interrupt pin.
input (No tri-state structure).
39..42 COM[3:0] O LCD COMmon Output LCD Data filled from F0H, please refer the LCD RAM
7..38 SEG[31:0] O LCD SEGment Output map.
44 LC2
43 LC1
B Charge Pump Switch 2
B Charge Pump Switch 1
Add one 0.1 µF capacitor between LC1 and LC2. Please refer
the application circuit.
45 L V3
46 L V2
48 L V1
B Charge Pump V3
B Charge Pump V2
B Charge Pump V1
LV3< 9 Volts.
Please refer the application circuit.
The PWM positive output
5 PWMP
O can drive speaker or buzzer Set the bit2 of VOC register as one to turn on PWM.
directly.
ʳ
2ʳ
V3.1E