HF88M04 Datasheet, PDF (10/19 Pages) King blillion Electronics Co.,Ltd. – 512K x 8 bit Mask ROM

King Billion Electronics Co., Ltd _HF88M04
駿億電子股份有限公司
registers avoids the necessity of using the RAM as mirror to keep the current status of latches in
applications. However, extra care should be taken when reading P0 and P1. To read the contents of P0
and P1, the DIR0 and DIR1 should be set to output mode. Otherwise, the pin status instead of P0 and P1
will be read. The same precaution should be applied in Read-Modify-Write sequence that read back the
contents of the output register of output mode pins and input status of input mode pins.
7 Timing Diagrams
Symbol
T_CE
T_WEL
T_WEH
T_DHeld
T_OLZ
T_ACE
T_OEL
T_OEH
T_CEHeld
T_ACER
T_ORL
T_ORH
T_RCEL
T_RCEH
Parameter
Chip selected to active width
WEn active low width
WEn inactive low width
Written data hold time
Read-Write mode transient time
ROM data file available time
Output enable low duty for access ROM
Output enable low duty for access ROM
Chip selection signal holding time
Register data available time
Output enable low duty for access register
Output enable low duty for access register
RS signal setup time
RS signal hold time
Min. Typ. Max. Unit
0 50 -
ns
100 -
-
ns
100 -
-
ns
50 -
-
ns
200 -
-
ns
50 -
-
ns
250 -
-
ns
150 -
-
ns
50 -
-
ns
30 -
-
ns
100 -
-
ns
100 -
-
ns
50 -
-
ns
50 -
-
ns
January 16, 2004
Page 10 of 19
V1.11
This specification is subject to change without notice. Please contact sales person for the latest version before use.