JMC200-16 Datasheet, PDF (1/3 Pages) JIEJIE MICROELECTRONICS CO.,Ltd – Chip - double mesa SCRs of reverse blocking high-voltage

JIEJIE MICROELECTRONICS CO.,Ltd
JMC200-16/18/20
Description:
1) Chip: double mesa SCRs of reverse blocking high-voltage
2) Chip area: 20.0mm×17.4mm (central gate thyristor)
3) Technology: mesa glass passivation technology, multilayer metallization
technology and non-void welding by vacuum welding technology
Typical Application:
Reactive power compensation, solid state relay, power module, etc.
Absolute Maximum Ratings (Packaged into modules, unless otherwise specified, T_C=25℃)
Parameter
Test Conditions Symbol
Values
Unit
Operating junction temperature range
Repetitive peak off-state voltage
T_j=25℃
Repetitive peak reverse voltage
T_j=25℃
Average on-state current
T_C=80℃
T_j
-40-125
℃
V_DRM 1600/1800/2000 V
V_RRM 1600/1800/2000 V
I_T(AV)
200
A
Peak on-state surge current
I²t value for fusing
tp=10ms
tp=10ms
I_TSM
4500
A
I²t
101250
A²s
Critical rate of rise of on-state current
V_D=2/3V_DRM tp=200μs
I_G=0.3A T_j=125℃
dI_G/dt=0.3A/μs
dI/dt
150
A/μs
Electrical Characteristics (Packaged into modules, unless otherwise specified, T_C=25℃)
Parameter
Test Conditions Symbol
Values
Unit
Peak on-state voltage
Repetitive peak off-state current
Repetitive peak reverse current
Triggering gate current
I_T=680A tp=380μs
V_D=V_DRM
T_C=25℃
T_C=125℃
V_R=V_RRM
T_C=25℃
T_C=125℃
V_D=12V R_L=30Ω
V_TM
I_DRM1
I_DRM2
I_RRM1
I_RRM2
I_GT
≤1.8
V
≤100
μA
≤30
mA
≤100
μA
≤30
mA
20-150
mA
Latching current
I_G=1.2 I_GT
I_L
≤350
mA
Holding current
Triggering gate voltage
I _T=1A
I_H
V_D=12V R_L=30Ω
V_GT
≤250
mA
≤2
V
TEL：[phone]
- 1 / 3-
http://www.jjwdz.com