JMC110-12 Datasheet, PDF (1/3 Pages) JIEJIE MICROELECTRONICS CO.,Ltd – Chip - double mesa SCRs of reverse blocking high-voltage

JIEJIE MICROELECTRONICS CO.,Ltd
JMC110-12/16/18/20
Description:
1) Chip: double mesa SCRs of reverse blocking high-voltage
2) Chip area: 12.4mm×12.4mm (central gate thyristor)
3) Technology: mesa glass passivation technology, multilayer metallization
technology and non-void welding by vacuum welding technology
Typical Application:
Reactive power compensation, solid state relay, power module, etc.
Absolute Maximum Ratings (Packaged into modules, unless otherwise specified, T_C=25℃)
Parameter
Test Conditions Symbol
Values
Unit
Operating junction temperature range
Repetitive peak off-state voltage
Repetitive peak reverse voltage
Average on-state current
T_j=25℃
T_j=25℃
T_C=80℃
T_j
-40-125
℃
V_DRM 1200/1600/1800/2000 V
V_RRM 1200/1600/1800/2000 V
I_T(AV)
110
A
Peak on-state surge current
I²t value for fusing
Critical rate of rise of on-state current
tp=10ms
tp=10ms
V_D=2/3V_DRM
tp=200μs
I_G=0.3A T_j=125℃
dI_G/dt=0.3A/μs
I_TSM
I²t
dI/dt
2500
31250
150
A
A²s
A/μs
Electrical Characteristics (Packaged into modules, unless otherwise specified, T_C=25℃)
Parameter
Test Conditions Symbol
Values
Peak on-state voltage
Repetitive peak off-state current
Repetitive peak reverse current
Triggering gate current
Latching current
Holding current
I_T=350A tp=380μs
V_D=V_DRM
T_C=25℃
T_C=125℃
V_R=V_RRM
T_C=25℃
T_C=125℃
V_D=12V R_L=30Ω
I_G=1.2 I_GT
I _T=1A
V_TM
I_DRM1
I_DRM2
I_RRM1
I_RRM2
I_GT
I_L
I_H
≤1.8
≤100
≤20
≤100
≤20
20-120
≤300
≤250
Unit
V
μA
mA
μA
mA
mA
mA
mA
TEL：[phone]
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http://www.jjwdz.com