ASI4U Datasheet, PDF (45/70 Pages) Zentrum Mikroelektronik Dresden AG – Universal Actuator-Sensor Interface IC

ASI4U / ASI4U-E / ASI4U-F Datasheet
Figure 4.10 Flowchart – Data_Exchange_Disable
Filter_Enable
Sync_Enable
Safety_Mode
>=1
&
Data_Exchange_Disable
4.7.7. Master, Repeater, and Monitor Modes
In the Master, Repeater, and Monitor Modes, the configurations of the data input and data output ports are
different than in Slave Mode. The control signals defined in Table 4.17 are provided at the data input port in the
Master, Repeater, and Monitor Modes.
Table 4.17 Control Signal Inputs in the Master, Repeater, and Monitor Modes
DATA INPUT PORT SIGNAL NAME
DESCRIPTION
DI0
invert_ird_a
If the signals invert_ird_a and invert_ird_b are not equal, the IRD input signal
is inverted before further processing. See Table 4.6.
DI1
invert_ird_b
DI2
invert_led1_a If the signals invert_led1_a and invert_led1_b are not equal, the LED1 output
signal is inverted after processing. See Table 4.21.
DI3
invert_led1_b
Note: The complemented definition is designed to retain backward compatibility to A²SI-based AS-i Master
designs.
The Data Output Port is used exclusively in Monitor Mode to provide additional UART error signals. The signals
are defined to be active LOW and will be set immediately after a telegram error was detected. They become reset
at the beginning of the next telegram. The signals described in Table 4.18 are available:
Table 4.18 Error Signal Outputs in Monitor Mode
DATA PORT UART ERROR
OUTPUT
SIGNAL
DESCRIPTION
DO0
plscod_err
Pulse Code Error
Indicates faulty AS-i pulses. This is a disjunction of alternation
error, start bit error and end bit error. See section 4.12.1.
DO1
no_info_err
No Information Error
Length Error
The output signal is a disjunction of No_Information_Error and
Length_Error as defined in the AS-Interface Complete Spec V3.0.
The Monitor Mode does not distinguish between synchronized
and non-synchronized UART Mode. There is always only one bit
time supervised after the end of a telegram.
DO2
parb_err
Parity Bit Error
Received parity bit does not match the check sum calculated by
the UART.
DO3
ird_man_err
Manchester-II-Code Signal at IRD input violates Manchester-II-coding rules.
Error at IRD input
© 2016 Integrated Device Technology, Inc.
45
January 26, 2016