JHT24096A Datasheet, PDF (7/23 Pages) Jewel Hill Electronic – SPECIFICATIONS FOR LCD MODULE

JEWEL HILL ELECTRONIC CO.,LTD.
7. MODULE FUNCTION DESCRIPTION
7.1. PIN DESCRIPTION
Pin No.
1
2
3
4
5
6
7
8
9-16
17
18
19
20
21
22
23
24
25
26
Symbol
Description
NC No connect
BM1
BM0
Bus mode and interface selection terminal
CS Chip Selection terminal
RST Reset signal input terminal
CD Data/Command Register Selection
WR0
WR1
D0-D7
VDD
VDD2
WR[1:0] controls the read/write operation of the host interface.
Bi-directional bus for both serial and parallel host interfaces.
Connect unused pins to VDD or VSS.
Power supply terminal, connect together for a positive voltage(2.7 to
3.3V)
VSS Ground
VLCD LCD power supply, A by-pass capacitor C L between VLCD and VSS
VB0+
VB0-
VBIAS
VB1+
VB1-
LCD Bias Voltages. These are the voltage source to provide SEG
driving currents. These voltages are generated internally. Connect
capacitors of CBX value between VB0+ and VB0–.
Connect a small bypass capacitor between VBIAS and VSS to reduce
noise.
LCD Bias Voltages. These are the voltage source to provide SEG
driving currents. These voltages are generated internally. Connect
capacitors of CBX value between VB1+ and VB1–.
NC No connect
JHG24096A
VER:3.01
-6-
Issue date: 2013/08/01