CPC5710N Datasheet, PDF (8/10 Pages) Clare, Inc. – Phone Line Monitor (PLM) IC

INTEGRATED CIRCUITS DIVISION
CPC5710N
3.2 Non-Intrusive Line Monitoring, Display Feature (Caller ID) Signal
Reception, and Ringing Detection Application
This application uses the logic input LIN/CMP to select
between ringing detection or buffering display feature
(caller-ID) and voice signals. Note the AC coupling of
the tip and ring signals.
With this circuit, setting LIN/CMP to a logic high
enables the ringing detector. After a valid ringing
period, configure LIN/CMP with a logic low to couple
the audio frequency signal to the output pins.
Please see “Detector Considerations” on page 5 for more
information on ringing detection.
Figure 5. Non-Intrusive Line Monitoring, Display Feature (Caller ID) Signal Reception, and Ringing
Detection Application Circuit
U1 CPC5710
From
Control
Logic
LIN/CMP ₃
V_DD
50kΩ
+
3.3 or 5 V
V_DD
1 ^VDD
-
V_DD
1.625 V
-
2 CMPOUT
RINGING DET
TIP
RING
R1 R2 C1
IN+
6
R5
R3
R4 C2
1.5MΩ
0603
7
IN-
R1-4 C1,2
1.8 MΩ 220 pF
+
++
A_V=6
--
0V
2V
Switch shown
in Detector Mode
5 LINOUT+
4 LINOUT-
Display Feature Output
V_OUT = V_IN at 500 Hz
V_SS
+
-
1.25 V
8 _GND
GND
Unless noted otherwise:
All resistors are 1/8 W, 1%, 1206.
3.2.1 Frequency Response
The blocking capacitors used in this application circuit
affect the frequency response of the system. With the
components shown, response rolls off 3dB @ 166Hz.
Other values can be used for different response
characteristics.
3.3 Regulatory Issues
Component sizing and value recommendations shown
in the application circuits above will need to be
reviewed with regard to the regulatory and safety
requirements for each particular application.
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