EVDD430S Datasheet, PDF (3/4 Pages) IXYS Corporation – 30A Ultra Fast MOSFET / IGBT Driver Evaluation Boards

Input
Function
Vcc In
Supply 8V-35V
GND
Ground
Signal In
External drive signal
Disable
High for device disable
INV**
Output inversion
UVSEL**
Under voltage select
** Available on the EVDD430S board only
Figure 7 - PCB Connection Table
EVDD430S/EVDD430CY
The Evaluation Boards are supplied with either IXDD408YI,
IXDD409YI, IXDI409YI, IXDN409YI or IXDD414YI 5-Pin TO-
263 devices installed, depending upon the evaluation board
part number ordered. To use the evaluation board with a
different package type, the installed device must be re-
moved, and the new device installed in the appropriate
location.
Signal In ^TP3
Disable
TP4
JP1 open for non-inverted output, jumpered for inverted
JP2 open for UVSEL at 12.5V, jumpered for 8.5V
Vcc In TP1
R5 3.32
+
R3 JP1 JP2
2K
R11 220
R1 100
Q3
2N7000
2
R6
10K
R4
R2
49.9
1K
U1
1 _Vcc
2
Vcc
3 _Vcc
4 _Vcc
5
N/C
6 _UVSEL
7
N/C
8 _IN
9 _EN
10
INV
11 _GND
12 _GND
13 _GND
14 _GND
Vcc ²⁸
27
Vcc
Vcc ²⁶
Vcc ²⁵
24
OUT P
OUT P ²³
22
OUT P
OUT N ²¹
OUT N ²⁰
19
OUT N
GND ¹⁸
GND ¹⁷
GND ¹⁶
GND ¹⁵
+
+
+
R7 1
R8 1
R9 1
R10 1
RA
DA
Not Loaded
GND
TP2
+
+
+
+
+
Drain ^TP5
2
Q1
3
1
TO-247
Q2
3
2
SOT-227
1,4
Figure 8 EVDD430S Schematic Diagram
Vcc In ^TP1
+
+
+
+
+
+
+
+
TP3
Signal In
TP4
Disable
R3 10K
R7 240
R5 100
2
R4 49.9
R6 1K
Q1
2N7000
U1 / U2
CI / YI package
P1 Vcc
P2 OUT
P3 GND
P4 IN
P5 EN
R1 1
R2 1
RA
DA
Not Loaded
TP2
2
Q2
3
1
TO-247
3
Q3
2
SOT-227
1,4
GND
TP5
Figure 9 - EVDD430CY Schematic Diagram
NOTE: The schematic shows two MOSFET devices. However only one device can be installed at any time.
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