CPC5620 Datasheet, PDF (14/18 Pages) Clare, Inc. – LITELINK III Phone Line Interface IC (DAA)

INTEGRATED CIRCUITS DIVISION
3.6.3 Mode Pin Usage
Assert the MODE pin low to introduce a 7 dB pad into
the transmit path and add 7 dB of gain to the receive
path. These changes compensate for the gain
changes made to the transmit and receive paths in
reactive termination implementations.
4. Regulatory Information
LITELINK III can be used to build products that comply
with the requirements of TIA/EIA/IS-968 (formerly
FCC part 68), FCC part 15B, TBR-21, EN60950,
UL1950, EN55022B, IEC950/IEC60950, CISPR22B,
EN55024, and many other standards. LITELINK
provides supplementary isolation. Metallic surge
requirements are met through the inclusion of a
Sidactor in the application circuit. Longitudinal surge
protection is provided by LITELINK’s optical barrier
technology and the use of high-voltage components in
the application circuit as needed.
5. LITELINK Design Resources
The IXYS Integrated Circuits Division web site has a
wealth of information useful for designing with
LITELINK, including application notes and reference
designs that already meet all applicable regulatory
requirements. See the following links:
LITELINK datasheets and reference designs
Application note AN-117 Customize Caller ID Gain
and Ring Detect Voltage Threshold
Application note AN-146, Guidelines for Effective
LITELINK Designs
Application note AN-152 LITELINK II to LITELINK III
Design Conversion
Application note AN-155 Understanding LITELINK
Display Feature Signal Routing and Applications
CPC5620/CPC5621
Insertion loss with MODE de-asserted and the
resistive termination application circuit is 0 dB.
Insertion loss with the reactive termination application
circuit and MODE asserted is also 0 dB.
The information provided in this document is intended
to inform the equipment designer but it is not sufficient
to assure proper system design or regulatory
compliance. Since it is the equipment manufacturer's
responsibility to have their equipment properly
designed to conform to all relevant regulations,
designers using LITELINK are advised to carefully
verify that their end-product design complies with all
applicable safety, EMC, and other relevant standards
and regulations. Semiconductor components are not
rated to withstand electrical overstress or electro-static
discharges resulting from inadequate protection
measures at the board or system level.
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