IXGR60N60U1 Datasheet, PDF (1/5 Pages) IXYS Corporation – LowV-CE(sat) IGBT with Diode ISOPLUS247-TM (Electrically Isolated Back Surface)

Low V_CE(sat) IGBT
with Diode
IXGR 60N60U1
ISOPLUS247^TM
(Electrically Isolated Back Surface)
V_CES = 600 V
I_C25
= 75 A
V_CE(sat) = 1.7 V
Preliminary data
Symbol
Test Conditions
V
CES
V_CGR
T
J
= 25°C to 150°C
T_J = 25°C to 150°C; R_GE = 1 MW
V_GES
V
GEM
Continuous
Transient
I_C25
I_C100
I_CM
T_C = 25°C
T_C = 90°C
T_C = 25°C, 1 ms
SSOA V_GE = 15 V, T_VJ = 125°C, R_G = 10 W
(RBSOA) Clamped inductive load; V = 0.8 V
CL
CES
P_C
T_C = 25°C
T_J
T_JM
T_stg
T_L
1.6 mm (0.062 in.) from case for 10 s
V_ISOL 50/60Hz, RMS, t = 1minute, leads-to tab
Weight
Maximum Ratings
600
V
600
V
±20
V
±30
V
75
A
60
A
200
A
I_CM = 100
A
300
W
-55 ..+ 150
°C
150
°C
-55...+ 150
°C
300
°C
2500
V
5
g
Symbol
BV
CES
V_GE(th)
I
CES
I_GES
V_CE(sat)
Test Conditions
I = 1 mA, V = 0 V
C
GE
I_C = 250 mA, V_CE = V_GE
V =V
CE
CES
V_GE = 0 V
V_CE = 0 V, V_GE = ±20 V
I_C = I_C100, V_GE = 15 V
Characteristic Values
(T_J = 25°C, unless otherwise specified)
min. typ. max.
600
2.5
T
J
=
25°C
T_J = 150°C
V
5.5 V
250 mA
2 mA
±100 nA
1.7 V
ISOPLUS247^TM
G
CE
Isolated back surface*
G = Gate,
E = Emitter,
C = Collector,
TAB = Collector
* Patent pending
Features
• Silicon chip on Direct-Copper-Bond
substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
• Low collector to tab capacitance
(<25pF)
• Rugged polysilicon gate cell structure
• Fast intrinsic Rectifier
• Low V IGBT and standard diode
CE(sat)
for minimum on-state conduction
losses
• MOS Gate turn-on for drive simplicity
Applications
• Solid state relays
• Capacitor discharge circuits
• High power ignition circuits
Advantages
• Space savings (two devices in one
package)
• Reduces assembly time and cost
• High power density
IXYS reserves the right to change limits, test conditions, and dimensions.
© 2000 IXYS All rights reserved
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