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IXFR58N20Q Datasheet, PDF (1/2 Pages) IXYS Corporation – HiPerFET Power MOSFETs ISOPLUS247 Q-Class
HiPerFETTM Power MOSFETs IXFR 58N20Q
ISOPLUS247TM Q-Class
(Electrically Isolated Back Surface)
N-Channel Enhancement Mode
Avalanche Rated, High dV/dt
Low Gate Charge and Capacitances
Preliminary Data Sheet
V=
DSS
ID25 =
RDS(on) =
200 V
50 A
40 mΩ
trr ≤ 200 ns
Symbol
VDSS
V
DGR
VGS
V
GSM
I
D25
IDM
I
AR
EAR
EAS
dv/dt
P
D
TJ
TJM
Tstg
TL
V
ISOL
Weight
Symbol
VDSS
VGS(th)
I
GSS
IDSS
RDS(on)
Test Conditions
TJ = 25°C to 150°C
T
J
=
25°C
to
150°C;
R
GS
=
1
MΩ
Continuous
Transient
T
C
= 25°C
TC = 25°C, Note 1
T
C
= 25°C
TC = 25°C
TC = 25°C
IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS
TJ ≤ 150°C, RG = 2 Ω
T
C
= 25°C
1.6 mm (0.062 in.) from case for 10 s
50/60 Hz, RMS t = 1 min
Maximum Ratings
200
V
200
V
±20
V
±30
V
50
A
232
A
58
A
30
mJ
1.0
J
5 V/ns
300
W
-55 ... +150
°C
150
°C
-55 ... +150
°C
250
°C
2500
V~
5
g
Test Conditions
VGS = 0 V, ID = 250 µA
VDS = VGS, ID = 4mA
V
GS
=
±20
V,
V
DS
=
0
VDS = VDSS
V =0V
GS
VGS = 10 V, ID = 29A
Note 2
Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
200
V
2.0
4.0 V
±100 nA
TJ = 25°C
T
J
= 125°C
25 µA
1 mA
40 mΩ
ISOPLUS 247TM
E153432
G
D
Isolated back surface*
G = Gate
S = Source
D = Drain
* Patent pending
Features
z Silicon chip on Direct-Copper-Bond
substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
z Low drain to tab capacitance(<50pF)
z IXYS advanced low Qg process
z Rugged polysilicon gate cell structure
z Unclamped Inductive Switching (UIS)
rated
z Fast intrinsic diode
Applications
z DC-DC converters
z Battery chargers
z Switched-mode and resonant-mode
power supplies
z DC choppers
z AC motor control
Advantages
z Easy assembly
z Space savings
z High power density
© 2003 IXYS All rights reserved
DS98591B(01/03)