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IXFR26N50Q Datasheet, PDF (1/2 Pages) IXYS Corporation – HiPerFET Power MOSFETs ISOPLUS247 (Electrically Isolated Back Surface)
HiPerFETTM Power MOSFETs
ISOPLUS247TM
IXFR 26N50Q
IXFR 24N50Q
(Electrically Isolated Back Surface)
N-Channel Enhancement Mode
High dV/dt, Low trr, HDMOSTM Family
VDSS
ID25
500 V 24 A
500 V 22 A
trr ≤ 250 ns
RDS(on)
0.20 Ω
0.23 Ω
Symbol
VDSS
V
DGR
VGS
V
GSM
ID25
IDM
IAR
EAR
EAS
dv/dt
PD
TJ
TJM
Tstg
TL
VISOL
Weight
Symbol
VDSS
VGS(th)
I
GSS
IDSS
RDS(on)
Test Conditions
Maximum Ratings
TJ = 25°C to 150°C
500
TJ = 25°C to 150°C; RGS = 1 MΩ
500
Continuous
±20
Transient
±30
TC = 25°C
26N50Q 24
24N50Q 22
TC = 25°C, Pulse width limited by TJM 26N50Q 104
24N50Q 96
TC = 25°C
26N50Q 26
24N50Q 24
TC = 25°C
TC = 25°C
IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS
TJ ≤ 150°C, RG = 2 Ω
TC = 25°C
30
1.5
5
250
-55 ... +150
150
-55 ... +150
1.6 mm (0.062 in.) from case for 10 s
300
50/60 Hz, RMS t = 1 minute leads-to-tab
2500
5
V
V
V
V
A
A
A
A
A
A
mJ
J
V/ns
W
°C
°C
°C
°C
V~
g
Test Conditions
VGS = 0 V, ID = 250uA
VDS = VGS, ID = 4mA
VGS = ±20 VDC, VDS = 0
VDS = 0.8 VDSS
VGS = 0 V
VGS = 10 V, ID = IT
Notes 1 & 2
Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
500
V
2.5
4.5 V
±100 nA
TJ = 25°C
TJ = 125°C
26N50Q
24N50Q
25 µA
1 mA
0.20 Ω
0.23 Ω
ISOPLUS 247TM
E153432
G
D
Isolated back surface*
G = Gate
S = Source
D = Drain
* Patent pending
Features
l Silicon chip on Direct-Copper-Bond
substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
l Low drain to tab capacitance(<35pF)
l Low RDS (on) HDMOSTM process
l Rugged polysilicon gate cell structure
l Unclamped Inductive Switching (UIS)
rated
l Fast intrinsic Rectifier
Applications
l DC-DC converters
l Battery chargers
l Switched-mode and resonant-mode
power supplies
l DC choppers
l AC motor control
Advantages
l Easyassembly:noscrews,orisolation
foils required
l Space savings
l High power density
l Low collector capacitance to ground
(low EMI)
© 2001 IXYS All rights reserved
98664A (5/01)