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IXFC15N80Q Datasheet, PDF (1/2 Pages) IXYS Corporation – HiPerFET ISOPLUS 220 MOSFET Q-Class Electrically Isolated Back Surface
HiPerFETTM
IXFC 15N80Q
ISOPLUS 220TM MOSFET
Q-Class
Electrically Isolated Back Surface
N-Channel Enhancement Mode
Avalanche Rated, High dv/dt, Low Qg
VDSS
ID25
RDS(on)
= 800 V
= 13 A
= 0.65 Ω
trr ≤ 250 ns
Symbol
VDSS
VDGR
VGS
VGSM
ID25
IDM
IAR
EAR
EAS
dv/dt
PD
TJ
TJM
Tstg
TL
VISOL
FC
Weight
Test Conditions
TJ = 25°C to 150°C
TJ = 25°C to 150°C; RGS = 1 MΩ
Continuous
Transient
TC = 25°C
TC = 25°C, pulse width limited by TJM
TC = 25°C
TC = 25°C
TC = 25°C
IS ≤ IDM, di/dt ≤ 100 A/µs, VDD ≤ VDSS,
TJ ≤ 150°C, RG = 2 Ω
TC = 25°C
1.6 mm (0.062 in.) from case for 10 s
50/60 Hz, RMS t = 1 min leads to tab
mounting force with clip
Maximum Ratings
800
V
800
V
±20
V
±30
V
13
A
60
A
15
A
30
mJ
1.0
J
10
V/ns
230
W
-40 ... +150
°C
150
°C
-40 ... +150
°C
300
°C
2500
V
11...65 / 2.5...15
N/lb
2
g
Symbol
Test Conditions
(TJ = 25°C, unless otherwise specified)
VDSS
VGS = 0 V, ID = 3 mA
Characteristic Values
Min. Typ. Max.
800
V
VGS(th)
VDS = VGS, ID = 4 mA
2.0
4.5 V
IGSS
VGS = ±20 VDC, VDS = 0
±100 nA
IDSS
VDS = VDSS
VGS = 0 V
TJ = 25°C
TJ = 125°C
25 µA
1 mA
RDS(on)
VGS = 10 V, ID = 0.5 ID25
Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 %
0.65 Ω
ISOPLUS220TM
G
DS
Isolated back surface*
G = Gate
S = Source
D = Drain
Features
z Silicon chip on Direct-Copper-Bond
substrate
- High power dissipation
- Isolated mounting surface
- 2500V electrical isolation
z Low drain to tab capacitance(<35pF)
z
z
LRouwggReDdS
p(ono) lysilicon
gate
cell
structure
z Unclamped Inductive Switching (UIS)
rated
z Fast intrinsic Rectifier
Applications
z DC-DC converters
z Battery chargers
z Switched-mode and resonant-mode
power supplies
z DC choppers
z AC motor control
Advantages
z Easy assembly: no screws or isolation
foils required
z Space savings
z High power density
See IXFH15N80Q data sheet for
characteristic curves
© 2003 IXYS All rights reserved
DS98946B(07/03)