IXDP610 Datasheet, PDF (1/8 Pages) IXYS Corporation – Bus Compatible Digital PWM Controller, IXDP 610

Bus Compatible Digital PWM Controller, IXDP 610
IXDP 610
Description
The IXDP610 Digital Pulse Width
Modulator (DPWM) is a programmable
CMOS LSI device which accepts digital
pulse width data from a microprocessor
and generates two complementary,
non-overlapping, pulse width modula-
ted signals for direct digital control of
switching power bridge. The DPWM is
designed to be operated under the
direct control of a microprocessor and
interfaces easily with most standard
microprocessor and microcomputer
buses. The IXDP610 is packaged in an
18-Pin slim DP.
The PWM waveform generated by the
IXDP610 results from comparing the
output of the Pulse Width counter to
the number stored in the Pulse Width
Latch (see below). A programmable
"dead-time" is incorporated into the
PWM waveform. The Dead-Time Logic
disables both outputs on each
transition of the Comparator output for
the required dead-time interval.
The output stage provides complemen-
tary PWM output signals capable of
sinking and sourcing 20 mA at TTL
voltage levels. The Output Disable
logic can be activated either by
software or hardware. This facilitates
cycle-by-cycle current-limit, short-
circuit, over-temperature, and
desaturation protection schemes.
The IXDP610 is capable of operating at
PWM frequencies from zero to 390kHz;
the dead-time is programmable from
zero to 14 clock cycles (0 to 11 % of
the PWM cycle), which allows
operation with fast power MOSFETs,
IGBTs, and bipolar power transistors. A
trade-off between PWM frequency and
resolution is provided by selecting the
counter resolution to be 7-bit or 8-bit.
The 20 mA output drive makes the
IXDP610 capable of directly driving
opto isolators and Smart Power
devices. The fast response to pulse
width commands is achieved by
instantaneous change of the outputs to
correspond to the new command. This
eliminates the one-cycle delay usually
associated with other digital PWM
implementations.
Features
G Microcomputer bus compatible
G Two complementary outputs for
direct control of a switching power
bridge
G Dynamically programmable pulse
width ranges from 0 to 100 %
G Two modes of operation: 7-bit or 8-
bit resolution
G Switching frequency range up to
390 kHz
G Programmable Dead-time Counter
prevents switching overlap
G Cycle-by-Cycle disable input to
protect against over-current, over-
temperature, etc.
G Outputs may be disabled under
software control
G Special locking bit prevents damage
to the stage in the event of a
software failure
G 18-pin slim DIP package
Dimensions in inch and mm
18-Pin Slim DIP
Symbol
V_CC
V_IN
V_out
P_D
T_stg
1
Definition
Supply voltage
Input voltage
Output voltage
Maximum power dissipation
Storage temperature range
Maximum Ratings
-0.3 ... 5.5 V
-0.3 ... V_CC + 0.3
V
-0.3 ... V_CC + 0.3
V
500 mW
-40 ... 125 °C
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