IXDD415 Datasheet, PDF (1/8 Pages) IXYS Corporation – Dual 15 Ampere Low-Side Ultrafast MOSFET Driver

IXDD415SI
Dual 15 Ampere Low-Side Ultrafast MOSFET Driver
Features
• Built using the advantages and compatibility
of CMOS and IXYS HDMOS^TM processes
• Latch-Up Protected
• High Peak Output Current: Dual 15A Peak
• Wide Operating Range: 8V to 30V
• Rise And Fall Times of <3ns
• Minimum Pulse Width Of 6ns
• Ability to Disable Output under Faults
• High Capacitive Load
Drive Capability: 4nF in <5ns
• Matched Rise And Fall Times
• 32ns Input To Output Delay Time
• Low Output Impedance
• Low Supply Current
Applications
• Driving RF MOSFETs
• Class D or E Switching Amplifier Drivers
• Multi MHz Switch Mode Power Supplies (SMPS)
• Pulse Generators
• Acoustic Transducer Drivers
• Pulsed Laser Diode Drivers
• DC to DC Converters
• Pulse Transformer Driver
Figure 1 - Functional Diagram
Vcc (1, 2)
General Description
The IXDD415 is a dual CMOS high speed high current gate
driver specifically designed to drive MOSFETs in Class D and E
HF RF applications, as well as other applications requiring
ultrafast rise and fall times or short minimum pulse widths.
Each output of the IXDD415 can source and sink 15A of peak
current while producing voltage rise and fall times of less than
3ns. The outputs of the IXDD415 may be paralleled, producing a
single output of up to 30A with comparable rise and fall times.
The input of the driver is compatible with TTL or CMOS and is
fully immune to latch up over the entire operating range.
Designed with small internal delays, cross conduction/current
shoot-through is virtually eliminated in the IXDD415. Its features
and wide safety margin in operating voltage and power make
the IXDD415 unmatched in performance and value.
The IXDD415 has two enable inputs, ENA and ENB. These
enable inputs can be used to independently disable either of the
outputs, OUTA or OUTB, for added flexibility. Additionally, the
IXDD415 incorporates a unique ability to disable the output
under fault conditions. When a logical low is forced into the
Enable inputs, both final output stage MOSFETs (NMOS and
PMOS) are turned off. As a result, the output of the IXDD415
enters a tristate mode and achieves a Soft Turn-Off of the
MOSFET when a short circuit is detected. This helps prevent
damage that could occur to the MOSFET if it were to be
switched off abruptly due to a dv/dt over-voltage transient.
The IXDD415 is available in a 28 pin SO package (IXDD415SI),
incorporating DEI's patented ⁽¹⁾ RF layout techniques to minimize
stray lead inductances for optimum switching performance.
(1) _{DEI U.S. Patent #4,891,686}
Vcc (3, 4)
INA (7)
ENA (6)
GND (25, 26)
Vcc (11, 12)
200k
OUTA (22, 23, 24)
GND (27, 28)
Vcc (13, 14)
INB (8)
ENB (9)
200k
GND (15, 16)
Copyright © IXYS CORPORATION 2001 Patent Pending
OUTB (19, 20, 21)
GND (17, 18)
First Release