IS62WV5128BLL-55HLI Datasheet, PDF (7/17 Pages) Integrated Silicon Solution, Inc – 512K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

IS62WV5128ALL, IS62WV5128BLL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
55 ns
70 ns
Min. Max.
Min. Max.
Unit
tRC
Read Cycle Time
55
—
70
—
ns
tAA
Address Access Time
— 55
— 70
ns
tOHA
Output Hold Time
10
—
10
—
ns
tACS1
CS1 Access Time
— 55
— 70
ns
tDOE
OE Access Time
— 25
— 35
ns
tHZOE⁽²⁾
OE to High-Z Output
— 20
— 25
ns
tLZOE⁽²⁾
OE to Low-Z Output
5
—
5
—
ns
tHZCS1
CS1 to High-Z Output
0
20
0
25
ns
tLZCS1
CS1 to Low-Z Output
10
—
10
—
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to
VDD-0.2V/VDD-0.3V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS1 = OE = VIL, WE = VIH)
ADDRESS
DOUT
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
Integrated Silicon Solution, Inc. — www.issi.com
7
Rev. E
01/29/08