IS61LV2568_03 Datasheet, PDF (4/9 Pages) Integrated Silicon Solution, Inc – 256K x 8 HIGH-SPEED CMOS STATIC RAM

IS61LV2568
ISSI ^®
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
VIH
Input HIGH Voltage⁽¹⁾
VIL
Input LOW Voltage⁽¹⁾
ILI
Input Leakage
ILO
Output Leakage
Test Conditions
VDD = Min., IOH = –4.0 mA
VDD = Min., IOL = 8.0 mA
GND ≤ VIN ≤ VDD
GND ≤ VOUT ≤ VDD, Outputs Disabled
Note:
1. VIL(min) = –0.3V (DC); VIL(min) = –2.0V (pulse width - 2.0 ns).
VIH(max) = VDD + 0.3V (DC); VIH(max) = VDD + 2.0V (pulse width - 2.0 ns).
Com.
Ind.
Com.
Ind.
Min.
Max.
Unit
2.4
—
V
—
0.4
V
2.0 VDD + 0.3
V
–0.3
0.8
V
–1
1
µA
–5
5
–1
1
µA
–5
5
POWER SUPPLY CHARACTERISTICS⁽¹⁾ (Over Operating Range)
-10 ns
-12 ns
Symbol
ICC
ISB1
ISB2
Parameter
VDD Operating
Supply Current
TTL Standby
Current
(TTL Inputs)
CMOS Standby
Current
(CMOS Inputs)
Test Conditions
VDD = Max., CE = VIL
IOUT = 0 mA, f = Max.
VDD = Max.,
VIN = VIH or VIL
CE ≥ VIH, f = max
VDD = Max.,
CE ≥ VDD – 0.2V,
VIN ≥ VDD – 0.2V, or
VIN ≤ 0.2V, f = 0
Com.
Ind.
Com.
Ind.
Com.
Ind.
Min. Max.
— 125
— 135
— 40
— 50
Min. Max. Unit
— 110 mA
— 120
— 35 mA
— 45
— 10
— 20
— 10 mA
— 20
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE^(1,2)
Symbol
CIN
CI/O
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
VIN = 0V
VOUT = 0V
Max.
Unit
6
pF
8
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, VDD = 3.3V.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
02/07/03