IS61DDPB22M36 Datasheet, PDF (18/24 Pages) Integrated Silicon Solution, Inc – 72 Mb (2M x 36 & 4M x 18) DDR-IIP (Burst of 2) CIO Synchronous SRAMs

72 Mb (2M x 36 & 4M x 18)
D^DDR-IIP (Burst of 2) CIO Synchronous SRAMs
I³
JTAG AC Characteristics (T_A = 0 to +70° C, V_DD = 1.8V -5%, +5%)
Parameter
Symbol
Minimum
TCK cycle time
TCK high pulse width
TCk low pulse width
TMS setup
TMS hold
TDI setup
TDI hold
TCK low to valid data
t_THTH
20
t_THTL
7
t_TLTH
7
t_MVTH
4
t_THMX
4
t_DVTH
4
t_THDX
4
t_TLOV
—
1. See AC Test Loading on page 14.
Maximum
—
—
—
—
—
—
—
7
JTAG Timing Diagram
Units
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1
t_THTL
t_TLTH
t_THTH
TCK
t_THMX
TMS
t_THDX
t_MVTH
TDI
t_DVTH
TDO
t_TLOV
18
Integrated Silicon Solution, Inc.
Rev.  00A
03/31/08