IS61LV632A Datasheet, PDF (14/16 Pages) Integrated Silicon Solution, Inc – 32K x 32 SYNCHRONOUS FAST STATIC RAM

IS61LV632A
ISSI ^®
SNOOZE AND RECOVERY CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
Symbol
tKC
tKH
tKL
tKQ
tKQX⁽⁴⁾
tKQLZ^(4,5)
tKQHZ^(4,5)
tOEQ
tOEQX⁽⁴⁾
tOELZ^(4,5)
tOEHZ^(4,5)
tAS
tSS
tCES
tAH
tSH
tCEH
tZZS
tZZREC
tCFG
Parameter
-4
Min. Max.
Cycle Time
8—
Clock High Time
4—
Clock Low Time
4—
Clock Access Time
—4
Clock High to
Output Invalid
1.5 —
Clock High to
Output Low-Z
0—
Clock High to
Output High-Z
1.5 4
Output Enable to
Output Valid
— 4.5
Output Disable to
Output Invalid
0—
Output Enable to
Output Low-Z
0—
Output Disable to
Output High-Z
— 4.5
Address Setup Time 2.5 —
Address Status
Setup Time
2.5 —
Chip Enable Setup Time 2.5 —
Address Hold Time
0.5 —
Address Status
Hold Time
0.5 —
Chip Enable Hold Time 0.5 —
ZZ Standby⁽¹⁾
2—
ZZ Recovery⁽²⁾
2—
Configuration Setup⁽³⁾ 25 —
-5
Min. Max.
10 —
4—
4—
—5
1.5 —
0—
1.5 5
—5
0—
0—
— 4.8
2.5 —
2.5 —
2.5 —
0.5 —
0.5 —
0.5 —
2—
2—
35 —
-6
Min. Max.
12 —
4—
4—
—6
2—
0—
1.5 6
—6
0—
0—
—6
2.5 —
2.5 —
2.5 —
0.5 —
0.5 —
0.5 —
2—
2—
45 —
-7
Min. Max.
13 —
6—
6—
—7
2—
0—
26
—6
0—
0—
—6
2.5 —
2.5 —
2.5 —
0.5 —
0.5 —
0.5 —
2—
2—
52 —
-8
Min. Max.
15 —
6—
6—
—8
2—
0—
26
—6
0—
0—
—6
2.5 —
2.5 —
2.5 —
0.5 —
0.5 —
0.5 —
2—
2—
60 —
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
ns
Notes:
1. The assertion of ZZ allows the SRAM to enter a lower power state than when deselected within the time specified. Data
retention is guaranteed when ZZ is asserted and clock remains active.
2. ADSC and ADSP must not be asserted for at least 2 cyc after leaving ZZ state.
3. Configuration signal MODE is static and must not change during normal operation.
4. Guaranteed but not 100% tested. This parameter is periodically sampled.
5. Tested with load in Figure 2.
14
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
04/17/01