IS42SM16400G Datasheet, PDF (14/27 Pages) Integrated Silicon Solution, Inc – 1M x 16Bits x 4Banks Low Power Synchronous DRAM

IS42SM16400G
Table5: Function Truth Table
Current
State
/CS /RAS /CAS
L
L
L
L
L
L
L
L
H
L
L
H
Precharging
L
H
L
L
H
L
L
H
H
H
X
X
L
L
L
L
L
L
L
L
H
L
L
H
Row
L
H
L
Activating
L
H
L
L
H
H
H
X
X
L
L
L
L
L
L
L
L
H
L
L
H
Write
L
H
L
Recovering
L
H
L
L
H
H
H
X
X
Command
/WE BA
A0-A11
L
OP CODE
H
X
X
L
BA
X
H
BA
Row Add.
L
BA Col Add./ A10
H
BA Col Add./ A10
H
X
X
X
X
X
L
OP CODE
H
X
X
L
BA
X
H
BA
Row Add.
L
BA Col Add./A10
H
BA Col Add./A10
H
X
X
X
X
X
L
OP CODE
H
X
X
L
BA
X
H
BA
Row Add.
L
BA Col Add./A10
H
BA Col Add./A10
H
X
X
X
X
X
Description
Mode Register Set
Auto or Self Refresh
Precharge
Bank Activate
Write/WriteAP
Read/ReadAP
No Operation
Device Deselect
Mode Register Set
Auto or Self Refresh
Precharge
Bank Activate
Write/Write AP
Read/Read AP
No Operation
Device Deselect
Mode Register Set
Auto or Self Refresh
Precharge
Bank Activate
Write/WriteAP
Read/Read AP
No Operation
Device Deselect
Action
ILLEGAL
ILLEGAL
No Operation : Bank(s)
Idle after tRP
ILLEGAL
ILLEGAL
ILLEGAL
No Operation : Bank(s)
Idle after tRP
No Operation : Bank(s)
Idle after tRP
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
No Operation : ROw
Active after tRCD
No Operation : ROw
Active after tRCD
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Start Write : Optional
AP(A10=H)
Start Write : Optional
AP(A10=H)
No Operation : Row
Active after tDPL
No Operation : Row
Active after tDPL
Note
13,14
13
4,12
4,12
4,12
13,14
13
4,12
4,11,12
4,12
4,12
13,14
13
4,13
4,12
9
Rev. A | July 2010
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