61S6432 Datasheet, PDF (14/19 Pages) Integrated Silicon Solution, Inc – 64K x 32 SYNCHRONOUS PIPELINE STATIC RAM

IS61S6432
ISSI ^®
READ/WRITE CYCLE SWITCHING CHARACTERISTICS (Over Operating Range) (Continued)
Symbol Parameter
-5
-6
Min. Max. Min. Max.
tKC
Cycle Time
10 — 12 —
tKH
Clock High Time
3.5 — 4 —
tKL
Clock Low Time
3.5 — 4 —
tKQ
Clock Access Time
—5 —6
tKQX⁽¹⁾
Clock High to Output Invalid
1.5 — 1.5 —
tKQLZ^(1,2)
Clock High to Output Low-Z
0— 0—
tKQHZ^(1,2)
Clock High to Output High-Z
1.5 6 1.5 6
tOEQ
Output Enable to Output Valid
—5 —6
tOEQX⁽¹⁾
Output Disable to Output Invalid
0— 0—
tOELZ^(1,2)
Output Enable to Output Low-Z
0— 0—
tOEHZ^(1,2)
Output Disable to Output High-Z
—4 —5
tAS
Address Setup Time
2.5 — 2.5 —
tSS
Address Status Setup Time
2.5 — 2.5 —
tWS
Write Setup Time
2.5 — 2.5 —
tCES
Chip Enable Setup Time
2.5 — 2.5 —
tAH
Address Hold Time
0.5 — 0.5 —
tSH
Address Status Hold Time
0.5 — 0.5 —
tWH
Write Hold Time
0.5 — 0.5 —
tCEH
Chip Enable Hold Time
0.5 — 0.5 —
tCFG⁽³⁾
Configuration Setup
35 — 45 —
Notes:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Tested with load in Figure 2.
3. Configuration signal MODE is static and must not change during normal operation.
-7
-8
Min. Max. Min. Max.
13 — 15 —
6—6—
6—6—
—7—8
2—2—
0—0—
2626
—6—6
0—0—
0—0—
—6—6
2.5 — 2.5 —
2.5 — 2.5 —
2.5 — 2.5 —
2.5 — 2.5 —
0.5 — 0.5 —
0.5 — 0.5 —
0.5 — 0.5 —
0.5 — 0.5 —
52 — 60 —
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PB
Integrated Silicon Solution, Inc. • 1-800-379-4774
Rev.B
06/28/01