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IS61NF25632 Datasheet, PDF (12/20 Pages) Integrated Silicon Solution, Inc – SRAM
IS61NF25632 IS61NF25636 IS61NF51218
IS61NLF25632 IS61NLF25636 IS61NLF51218
ISSI ®
READ/WRITE CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
-10
Min. Max.
fmax Clock Frequency
— 83
tKC
Cycle Time
12 —
tKH
Clock High Time
3—
tKL
Clock Low Time
3—
tKQ
Clock Access Time
— 10
tKQX(2) Clock High to Output Invalid
3—
tKQLZ(2,3) Clock High to Output Low-Z
2.5 —
tKQHZ(2,3) Clock High to Output High-Z
—6
tOEQ
Output Enable to Output Valid
— 3.5
tOELZ(2,3) Output Enable to Output Low-Z
0—
tOEHZ(2,3) Output Disable to Output High-Z
—4
tAS
Address Setup Time
2—
tWS
Read/Write Setup Time
2—
tCES
Chip Enable Setup Time
2—
tSE
Clock Enable Setup Time
2—
tAVS
Address Advance Setup Time
2—
tDS
Data Setup Time
2—
tAH
Address Hold Time
0.5 —
tHE
Clock EnableHold Time
0.5 —
tWH
Write Hold Time
0.5 —
tCEH
Chip Enable Hold Time
0.5 —
tADVH
Address Advance Hold Time
0.5 —
tDH
Data Hold Time
0.5 —
Notes:
1. Configuration signal MODE is static and must not change during normal operation.
2. Guaranteed but not 100% tested. This parameter is periodically sampled.
3. Tested with load in Figure 2.
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00D
04/26/01