IS42S16400 Datasheet, PDF (1/54 Pages) Integrated Silicon Solution, Inc – 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM

IS42S16400
ISSI^®
1 Meg Bits x 16 Bits x 4 Banks (64-MBIT)
SYNCHRONOUS DYNAMIC RAM
FINAL PRODUCTION
MAY 2001
FEATURES
• Clock frequency: 166, 133, 100 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Self refresh modes
• 4096 refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
• Byte controlled by LDQM and UDQM
• Industrial temperature availability
• Package: 400-mil 54-pin TSOP II
OVERVIEW
ISSI's 64Mb Synchronous DRAM IS42S16400 is organized
as 1,048,576 bits x 16-bit x 4-bank for improved
performance. The synchronous DRAMs achieve high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock input.
PIN CONFIGURATIONS
54-Pin TSOP (Type II)
VCC
1
I/O0
2
VCCQ
3
I/O1
4
I/O2
5
GNDQ
6
I/O3
7
I/O4
8
VCCQ
9
I/O5
10
I/O6
11
GNDQ
12
I/O7
13
VCC
14
LDQM
15
WE
16
CAS
17
RAS
18
CS
19
BA0
20
BA1
21
A10
22
A0
23
A1
24
A2
25
A3
26
VCC
27
54
GND
53
I/O15
52
GNDQ
51
I/O14
50
I/O13
49
VCCQ
48
I/O12
47
I/O11
46
GNDQ
45
I/O10
44
I/O9
43
VCCQ
42
I/O8
41
GND
40
NC
39
UDQM
38
CLK
37
CKE
36
NC
35
A11
34
A9
33
A8
32
A7
31
A6
30
A5
29
A4
28
GND
PIN DESCRIPTIONS
A0-A11
BA0, BA1
I/O0 to I/O15
CLK
CKE
CS
RAS
CAS
Address Input
Bank Select Address
Data I/O
System Clock Input
Clock Enable
Chip Select
Row Address Strobe Command
Column Address Strobe Command
WE
LDQM
UDQM
Vcc
GND
VccQ
GNDQ
NC
Write Enable
Lower Bye, Input/Output Mask
Upper Bye, Input/Output Mask
Power
Ground
Power Supply for I/O Pin
Ground for I/O Pin
No Connection
This document contains TARGET SPECIFICATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best
possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
TARGET SPECIFICATION Rev. C
05/04/01