IS41C16100 Datasheet, PDF (1/20 Pages) Integrated Silicon Solution, Inc – 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

IS41C16100
IS41LV16100
1M x 16 (16-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
ISSI^®
April 2003
FEATURES
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval:
— Auto refresh Mode: 1,024 cycles /16 ms
— RAS-Only, CAS-before-RAS (CBR), and Hidden
— Self refresh Mode - 1,024 cycles / 128ms
• JEDEC standard pinout
• Single power supply:
— 5V ± 10% (IS41C16100)
— 3.3V ± 10% (IS41LV16100)
• Byte Write and Byte Read operation via two CAS
• Industrail Temperature Range -40^oC to 85^oC
PIN CONFIGURATIONS
50(44)-Pin TSOP (Type II)
42-Pin SOJ
VCC 1
I/O0 2
I/O1 3
I/O2 4
I/O3 5
VCC 6
I/O4 7
I/O5 8
I/O6 9
I/O7 10
NC 11
NC 12
NC 13
WE 14
RAS 15
NC 16
NC 17
A0 18
A1 19
A2 20
A3 21
VCC 22
44 GND
43 I/O15
42 I/O14
41 I/O13
40 I/O12
39 GND
38 I/O11
37 I/O10
36 I/O9
35 I/O8
34 NC
33 NC
32 LCAS
31 UCAS
30 OE
29 A9
28 A8
27 A7
26 A6
25 A5
24 A4
23 GND
VCC 1
I/O0 2
I/O1 3
I/O2 4
I/O3 5
VCC 6
I/O4 7
I/O5 8
I/O6 9
I/O7 10
NC 11
NC 12
WE 13
RAS 14
NC 15
NC 16
A0 17
A1 18
A2 19
A3 20
VCC 21
42 GND
41 I/O15
40 I/O14
39 I/O13
38 I/O12
37 GND
36 I/O11
35 I/O10
34 I/O9
33 I/O8
32 NC
31 LCAS
30 UCAS
29 OE
28 A9
27 A8
26 A7
25 A6
24 A5
23 A4
22 GND
DESCRIPTION
The ISSI IS41C16100 and IS41LV16100 are 1,048,576 x 16-bit
high-performance CMOS Dynamic Random Access Memories.
These devices offer an accelerated cycle access called EDO Page
Mode. EDO Page Mode allows 1,024 random accesses within a
single row with access cycle time as short as 20 ns per 16-bit word.
The Byte Write control, of upper and lower byte, makes the
IS41C16100 ideal for use in 16-bit and 32-bit wide data bus systems.
These features make the IS41C16100and IS41LV16100 ideally suited
for high-bandwidth graphics, digital signal processing, high-
performance computing systems, and peripheral applications.
The IS41C16100 and IS41LV16100 are packaged in a 42-pin 400-
mil SOJ and 400-mil 50- (44-) pin TSOP (Type II). The lead-free 400-
mil 50- (44-) option is available too.
KEY TIMING PARAMETERS
Parameter
-50 -60 Unit
Max. RAS Access Time (tRAC)
Max. CAS Access Time (tCAC)
50 60 ns
13 15 ns
Max. Column Address Access Time (tAA) 25 30 ns
Min. EDO Page Mode Cycle Time (tPC) 20 25 ns
Min. Read/Write Cycle Time (tRC)
84 104 ns
PIN DESCRIPTIONS
A0-A9
I/O0-15
WE
OE
RAS
UCAS
LCAS
Vcc
GND
NC
Address Inputs
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Upper Column Address Strobe
Lower Column Address Strobe
Power
Ground
No Connection
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
IIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
1
Rev. I
04/16/03