IS24C01B Datasheet, PDF (1/19 Pages) Integrated Silicon Solution, Inc – 1K-bit/2K-bit 2-WIRE SERIAL CMOS EEPROM

IS24C01B IS24C02B
ISSI^®
1K-bit/2K-bit
2-WIRE SERIAL CMOS EEPROM
APRIL 2006
FEATURES
• Two-Wire Serial Interface, I²C^TM compatible
–Bi-directional data transfer protocol
• Wide Voltage Operation
–Vcc = 1.8V to 5.5V
• 400 KHz (2.5V) and 1 MHz (5.0V) compatibility
• Low Power CMOS Technology
–Standby Current less than 6 µA (5.0V)
–Read Current less than 2 mA (5.0V)
–Write Current less than 3 mA (5.0V)
• Hardware Data Protection
–Write Protect Pin
• Sequential Read Feature
• Filtered Inputs for Noise Suppression
• Self time write cycle with auto clear
5 ms max. @ 2.5V
• Organization:
–IS24C01B 128x8 (128 bytes)
–IS24C02B 256x8 (256 bytes)
• 8 Byte Page Write Buffer
• High Reliability
–Endurance: 1,000,000 Cycles
–Data Retention: 100 Years
• Industrial and Automotive temperature ranges
• 8-pin PDIP, 8-pin SOIC, 8-pad DFN, and 8-pin
TSSOP packages
• Lead-free available
DESCRIPTION
The IS24C01B and IS24C02B are electrically
erasable PROM devices that use the standard 2-
wire interface for communications. The IS24C01B
and IS24C02B contain a memory array of 1K-bits
(128 x 8) and 2K-bits (256 x 8), respectively. Each
device is organized into 8 byte pages for page
write mode.
This EEPROM operates in a wide voltage range of
1.8V to 5.5V to be compatible with most application
voltages. ISSI designed this device family to be a
practical, low-power 2-wire EEPROM solution.
The devices are available in 8-pin PDIP, 8-pin
SOIC, 8-pad DFN, and 8-pin TSSOP packages.
The IS24C01B/02B maintains compatibility with
the popular 2-wire bus protocol, so it is easy to
use in applications implementing this bus type.
The simple bus consists of the Serial Clock wire
(SCL) and the Serial Data wire (SDA). Using the
bus, a Master device such as a microcontroller is
usually connected to one or more Slave devices
such as this device. The bit stream over the SDA
line includes a series of bytes, which identifies a
particular Slave device, an instruction, an address
within that Slave device, and a series of data, if
appropriate. The IS24C01B/02B has a
Write Protect pin (WP) to allow blocking of any
write instruction transmitted over the bus.
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
1
Rev. A
04/12/06