BU102 Datasheet, PDF (1/3 Pages) Savantic, Inc. – Silicon NPN Power Transistors

Inchange Semiconductor
Silicon NPN Power Transistors
Product Specification
BU102
DESCRIPTION
With TO-3 package
V _CEO(sus)=150V (min)
APPLICATIONS
Designed for horizontal deflection
output stage of CTV receivers
PINNING(see fig.2)
PIN
DESCRIPTION
1
Base
2
Emitter
3
Collector
Fig.1 simplified outline (TO-3) and symbol
Absolute maximum ratings(Ta= )
SYMBOL
PARAMETER
V_CBO
Collector-base voltage
V_CEO
V_EBO
I_C
P_C
Collector-emitter voltage
Emitter-base voltage
Collector current
Collectorl power dissipation
T_j
Junction temperature
T_stg
Storage temperature
CONDITIONS
Open emitter
Open base
Open collector
T_C=25
VALUE
400
150
6
7
100
150
-55~150
UNIT
V
V
V
A
W