IRS20954S Datasheet, PDF (9/25 Pages) International Rectifier – Protected Digital Audio Driver

IRS20954S
Functional Description
Floating PWM Input
The IRS20954 has a floating input interface which enables easy half bridge implementation. Three pins, V_DD, CSD
and IN, are referenced to V_SS. As a result, the PWM input signal can be directly fed into IN referencing ground, which
is typically middle point of DC bus in a half bridge configuration.
The IRS20954 also has a non-floating input with V_SS tied to COM.
VDD
IN
CSD
VSS
Floating Bias
0V – 200V
COM
HV
LEVEL
SHIFT
PROTECTION
Floating Input Isolation
IRS20954
Figure 5: Floating PWM Input Structure
Over-Current Protection (OCP)
The IRS20954 features over-current protection to protect the power MOSFET from over load conditions. The IRS20954 enters
shutdown mode when it detects over-current condition either from low side or high side current sensing. The timing control
block measures resume timing interval with an external timing capacitor Ct. All the critical timing of the over-current protection is
specified and guaranteed for secure protection.
The sequence on the over-current detection is:
1. As soon as either high or low side current sensing block detects over-current condition, the OC Latch (OCL) flips and
shutdowns the outputs LO and HO.
2. The CSD pin starts discharging the external capacitor Ct.
3. When V_SCD crosses the lower threshold Vth2, the output signal from the COMP2 resets the OCL.
4. The CSD pin starts charging the external capacitor Ct.
5. When V_SCD crosses the upper threshold Vth1, the COMP1 flips and enables shutdown signal released.
6. If one of current sensing block detects over-current condition, the sequence is repeated until the cause of over-current
goes away.
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