AHP2805SWES Datasheet, PDF (9/12 Pages) International Rectifier – HIGH RELIABILITY HYBRID DC/DC CONVERTERS

AHP28XXS Series
Attempts to adjust the output voltage to a value greater than
120% of nominal should be avoided because of the potential
of exceeding internal component stress ratings and
subsequent operation to failure. Under no circumstance
should the external setting resistor be made less than 500Ω.
By remaining within this specified range of values, completely
safe operation fully within normal component derating is
assured.
Examination of the equation relating output voltage and
resistor value reveals a special benefit of the circuit topology
utilized for remote sensing of output voltage in the AHP28XXS
series of converters. It is apparent that as the resistance
increases, the output voltage approaches the nominal set
value of the device. In fact the calculated limiting value of
output voltage as the adjusting resistor becomes very large
is ≅ 250mV above nominal device voltage.
The consequence is that if the +sense connection is
unintentionally broken, an AHP28XXS has a fail-safe output
voltage of Vout + 250mV, where the 250mV is independent
of the nominal output voltage. It can be further demonstrated
that in the event of both the + and - sense connections
being broken, the output will be limited to Vout + 500mV.
This 500mV is also essentially constant independent of the
nominal output voltage. While operation in this condition is
not damaging to the device, not all performance parameters
will be met.
Table 1. Nominal Resistance of Cu Wire
Wire Size, AWG
24 Ga
22 Ga
20 Ga
18 Ga
16 Ga
14 Ga
12 Ga
Resistance per ft
25.7 mΩ
16.2 mΩ
10.1 mΩ
6.4 mΩ
4.0 mΩ
2.5 mΩ
1.6 mΩ
As an example of the effects of parasitic resistance,
consider an AHP2815S operating at full power of 120 W.
From the specification sheet, this device has a minimum
efficiency of 83% which represents an input power of more
than 145 W. If we consider the case where line voltage is
at its minimum of 16 volts, the steady state input current
necessary for this example will be slightly greater than 9
amperes. If this device were connected to a voltage source
with 10 feet of 20 gauge wire, the round trip (input and
return) would result in 0.2 Ω of resistance and 1.8 volts of
drop from the source to the converter. To assure 16 volts
at the input, a source closer to 18 volts would be required.
In applications using the paralleling option, this drop will be
multiplied by the number of paralleled devices.
General Application Information
The AHP28XXS series of converters are capable of
providing large transient currents to user loads on demand.
Because the nominal input voltage range in this series is
relatively low, the resulting input current demands will be
correspondingly large. It is important therefore, that the line
impedance be kept very low to prevent steady state and
transient input currents from degrading the supply voltage
between the voltage source and the converter input.
In applications requiring high static currents and large
transients, it is recommended that the input leads be made
of adequate size to minimize resistive losses, and that a
good quality capacitor of approximately100µfd be connected
directly across the input terminals to assure an adequately
low impedance at the input terminals. Table I relates nominal
resistance values and selected wire sizes.
By choosing 14 or 16 gauge wire in this example, the
parasitic resistance and resulting voltage drop will be
reduced to 25% or 31% of that with 20 gauge wire.
Another potential problem resulting from parasitically induced
voltage drop on the input lines is with regard to the operation
of the enable 1 port. The minimum and maximum operating
levels required to operate this port are specified with respect
to the input common return line at the converter. If a logic
signal is generated with respect to a ‘common’ that is distant
from the converter, the effects of the voltage drop over the
return line must be considered when establishing the worst
case TTL switching levels. These drops will effectively
impart a shift to the logic levels. In Figure VII, it can be seen
that referred to system ground, the voltage on the input
return pin is given by
e =I •R
Rtn
Rtn
P
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