AHE281XD_15 Datasheet, PDF (7/10 Pages) International Rectifier – HYBRID-HIGH RELIABILITY DC/DC CONVERTER

AHE28XXD Series
Table III. Electrical Performance Characteristics - continued
Test
Symbol
Conditions
Group A Device
-55°C ≤Tc ≤+125°C
Subgroups Types
Vin = 28 Vdc ±5%, CL = 0
unless otherwise specified
Recovery time
TTLOAD
50% load to/from 100% load
4
All
step transient
load changes ^{1, 7}
5,6
No load to 50% load
4,5,6
All
50% load to no load
4,5,6
All
Output response
transient step
line changes ^{5, 12}
VOTLINE
Input step 17 to 40V dc
4,5,6
All
Input step 40 to 17V dc
4,5,6
All
Recovery time
transient
TTLINE
Input step 17 to 40V dc
4,5,6
All
step line
changes ^{1, 5, 12}
Input step 40 to 17V dc
4,5,6
All
Turn on
overshoot ⁹
Turn on delay ^{2, 9}
VTonOS
TonD
IOUT = 0 and ±500mA
IOUT = 0 and ±500mA
4,5,6
All
4,5,6
All
Load fault
TrLF
recovery ¹²
4,5,6
All
Limits
AHE2815D
Unit
Min
Max
70
µs
100
1500
5.0
1500
ms
mV pk
-1500
4.0
ms
4.0
600
mV pk
10
ms
10
ms
Notes to Specifications
1 Recovery time is measured from the initiation of the transient to where V_OUT has returned to within ±0.1 % of V_OUT at 50 % load.
2 Turn on delay time measurement is for either a step application of power at the input or the removal of a ground signal from the
inhibit pin (pin 2) while power is applied to the input.
3 An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit
protection and is the condition of maximum power dissipation.
4 Total power at both outputs. For operation at 16Vdc input, derate output power by 33 %.
5 Input step transition time between 2.0µs and 10µs.
6 Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess
of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry,
appearing as a short circuit during turn-on.
7 Load step transition time between 2.0µs and 10µs.
8 Bandwidth guaranteed by design. Tested for 20KHz to 2.0MHz.
9 Tested at each output.
10 When operating with unbalanced loads, at least 25 % of the load must be on the positive output to maintain regulation.
11 Parameter guaranteed by line and load regulation tests.
12 Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be
guaranteed to the limits specified in Table III.
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