IRFZ24N Datasheet, PDF (6/8 Pages) NXP Semiconductors – N-channel enhancement mode TrenchMOS transistor

IRFZ24N
V_DS
R_G
10 V
t_p
L
D.U.T.
I_AS
0.01Ω
+
- ^VDD
Fig 12a. Unclamped Inductive Test Circuit
V_(BR)DSS
t_p
V_DD
V_DS
I_AS
Fig 12b. Unclamped Inductive Waveforms
Q_G
10 V
Q_GS
Q_GD
V_G
Charge
Fig 13a. Basic Gate Charge Waveform
6
140
ID
TOP
4.2A
120
7.2A
BOTTOM 10A
100
80
60
40
20
0 ^{VDD = 25V}
25
50
75
A
100
125
150
175
Starting T_J , Junction Tem perature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
+
D.U.T. -V^DS
V_GS
3mA
I_G
I_D
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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