IRFH5006PBF_15 Datasheet, PDF (6/9 Pages) International Rectifier – Secondary Side Synchronous Rectification

IRFH5006PbF
+
‚
-

R_G
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W.
Period
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance
Current Transformer
-^„ +
D.U.T. I_SD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V_DS Waveform _{Diode Recovery}
dv/dt
• dv/dt controlled by R_G
• Driver same type as D.U.T.
• I_SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
V_DD
+
-
Re-Applied
Voltage
Body Diode
Inductor Curent
Forward Drop
Ripple ≤ 5%
* V_GS = 5V for Logic Level Devices
* V_GS=10V
V_DD
I_SD
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET^® Power MOSFETs
15V
tp
V(BR)DSS
VDS
L
DRIVER
RG
20V
tp
D.U.T
I_AS
0.01Ω
+
- ^VDD
A
Fig 16a. Unclamped Inductive Test Circuit
I_AS
Fig 16b. Unclamped Inductive Waveforms
V_DS
V_GS
R_G
R_D
D.U.T.
V1_G0_SV
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
+_{-V DD}
Fig 17a. Switching Time Test Circuit
L
V^sC^$C^$Ã
DUT
0
1K
V_DS
90%
10%
V_GS
t_{d(on) tr}
t_{d(off) tf}
Fig 17b. Switching Time Waveforms
Id
Vds
Vgs
Vgs(th)
Fig 18a. Gate Charge Test Circuit
6
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Qgs1 Qgs2 Qgd
Qgodr
Fig 18b. Gate Charge Waveform
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May 19, 2015