English
Language : 

74ABT534A Datasheet, PDF (6/12 Pages) NXP Semiconductors – Octal D-type flip-flop, inverting 3-State
Philips Semiconductors
Octal D-type flip-flop, inverting (3-State)
Product specification
74ABT534A
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
SYMBOL
PARAMETER
WAVEFORM
ts(H)
ts(L)
Setup time, High or Low
Dn to CP
2
th(H)
th(L)
Hold time, High or Low
Dn to CP
2
tw(H)
tw(L)
CP pulse width
High or Low
1
NOTE:
1. This datasheet limit may vary among suppliers.
LIMITS
Tamb = +25oC
VCC = +5.0V
Min
Typ
Tamb = -40 to
+85oC
VCC = +5.0V ±0.5V
Min
1.0 1
0.4
1.0 1
0.3
1.0 1
1.0 1
0.5
–0.3
0.5
–0.4
1.5 1
0.8
2.0 1
1.0
0.5
0.5
1.5 1
2.0 1
UNIT
ns
ns
ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
1/fMAX
CP
VM
VM
VM
tw(H)
tPLH
tw(L)
tPHL
Qn
VM
VM
SA00165
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Dn ÉÉÉÉÉÉVÉÉÉM VÉÉÉM ÉÉÉÉÉÉÉÉÉÉÉÉVMÉÉÉÉÉÉVM ÉÉÉÉÉÉ
ts(H)
th(H)
ts(L)
th(L)
CP
VM
VM
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
Waveform 2. Data Setup and Hold Times
SA00107
OE
VM
VM
tPZH
tPHZ
Qn
VOH –0.3V
VM
0V
SA00166
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
OE
VM
VM
tPZL
tPLZ
Qn
VM
VOL +0.3V
SA00167
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
1997 Feb 03
6