M3H_15 Datasheet, PDF (5/11 Pages) International Rectifier – 28V Input, Single/Dual Output

M3H-SERIES
Electrical Performance Characteristics ( continued )
Parameter
Capacitive Load (CL)
M3H2803R3S
M3H2805S
M3H2005R2S
M3H2812S
M3H2815S
M3H2805D
M3H2812D
M3H2815D
Line Rejection
Isolation
Device Weight
MTBF
Group A
Subgroup
Conditions
-55°C ≤ TC ≤ +85°C
VIN = 28V DC ± 5%, CL =0
Unless otherwise specified
Limits
Min
Nom
Max
Unit
1
IOUT = 100% rated load
No effect on DC performance
Notes 1, 4, 7
Each output on duals
1
IOUT = 100% rated load
40
50
DC to 50KHz, Notes 1, 4
1
Input to Output or Any Pin to Case
100
except pin 3, test @ 500VDC
MIL-HDBK-217F2, SF, 35°C
1.5 x 10⁶
2200
1000
1000
180
µF
120
500
90
60
dB
MΩ
125
g
Hr
Notes. Electrical Performance Characteristics
1) Parameter is tested as part of design characterization or after design changes. Thereafter, parameter shall be guaranteed to the
limits specified.
2) Parameter verified during line and load regulation tests.
3) Output load current must be distributed such that at least 20% of the total load current is being provided by one of the outputs.
4) Load current split equally between outputs on dual output models.
5) Cross regulation is measured with 20% rated load on output under test while changing the load on the other output from 20% to 80%
of rated.
6) Guaranteed for a D.C. to 20MHz bandwidth. Tested using a 20KHz to 10MHz bandwidth using the circuit shown below.
7) Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. A capacitive load in excess
of the maximum limit may interfere with the proper operation of the converter’s overload protection, causing erratic behavior during
turn-on.
8) Overload power dissipation is defined as the device power dissipation with the load set such that V_OUT = 90% of nominal.
9) Load step transition time ≤ 10 µs.
10) Recovery time is measured from the initiation of the transient to where V_OUT has returned to within ±1% of
its steady state value.
11) Line step transition time ≤ 100 µs.
12) Turn-on delay time from either a step application of input power or a logic low to a logic high transition on the inhibit pin (pin 4) to
the point where V_OUT = 90% of nominal.
13) For operation at temperatures between +85°C and +125°C, derate the maximum output power linearly from 100% to 75%.
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