LS2801R5S_12 Datasheet, PDF (5/16 Pages) International Rectifier – HYBRID - HIGH RELIABILITY RADIATION HARDENED DC-DC CONVERTER

LS-SERIES
(28V Input, Single/Dual Output)
Electrical Performance Characteristics ( continued )
Parameter
Turn-on Overshoot (VOS)
LS2801R5S
LS2802R5S
LS2803R3S
LS2805S
LS2812S
LS2815S
LS2805D
LS2812D
LS2815D
Turn-on Delay (TDLY)
Group A
Subgroup
4,5,6
Conditions
-55°C ≤ TC ≤ +85°C
VIN = 28V DC ± 5%, CL = 0
unless otherwise specified
10% Load, Full Load
Notes 4,12
Limits
Unit
Min
Nom
Max
150
250
330
500
1000
mV
1000
500
1000
1000
ms
0
10
Capacitive Load (CL)
LS2801R5S
LS2802R5S
LS2803R3S
LS2805S
LS2812S
LS2815S
LS2805D
LS2812D
LS2815D
Line Rejection
Isolation
IOUT = 100% rated load
No effect on DC performance
Notes 1, 4, 7
Each output on duals
IOUT = 100% rated load
1
DC to 50KHz, Notes 1, 4
35
Input to Output or Any Pin to Case
1
except pin 3, test @ 500VDC
100
2500
2500
2200
1000
180
µF
120
500
90
60
50
dB
MΩ
Device Weight
MTBF
MIL-HDBK-217F2, SF, 35°C
4.0 x 10⁶
80
g
Hr
Notes for Electrical Performance Characteristics Table
1. Parameter is tested as part of design characterization or after design changes. Thereafter, parameter
shall be guaranteed to the limits specified.
2. Parameter verified during line and load regulation tests.
3. Output load current must be distributed such that at least 20% of the total load current is being provided by
one of the outputs.
4. Load current split equally between outputs on dual output models.
5. Cross regulation is measured with 20% rated load on output under test while changing the load on the
other output from 20% to 80% of rated.
6. Guaranteed for a D.C. to 20MHz bandwidth. Tested using a 20KHz to 10MHz bandwidth using the circuit
on page 6.
7. Capacitive load may be any value from 0 to the maximum limit without compromising dc performance. For
a capacitive load in excess of the maximum limit, consult the factory.
8. Overload power dissipation is defined as the device power dissipation with the load set such that VOUT =
90% of nominal.
9. Load step transition time ≤ 10µs.
10. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1% of
its steady state value.
11. Line step transition time ≤ 100µs.
12. Turn-on delay time from either a step application of input power or a logic low to a logic high transition on
the inhibit pin (pin 4) to the point where VOUT = 90% of nominal.
13. For operation at temperatures between +85°C and 125°C, de-rate the maximum output power linearly from
100% to 75%.
14. End of life (EOL) is ±3%
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