AUIRFZ24NS Datasheet, PDF (5/13 Pages) International Rectifier – Advanced Planar Technology Low On-Resistance

AUIRFZ24NS/L
700
V _GS = 0V,
f = 1MHz
C_iss = C_gs + C_gd , C_ds SHORTED
600
C_rss = C_gd
C_oss = C_ds + C_gd
500
Ciss
400
Coss
300
200
Crss
100
0
A
1
10
100
V_DS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
20
I_D = 10A
16
V_DS = 44V
V_DS = 28V
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
4
8
12
16
20
Q _G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
T_J = 175°C
T_J = 25°C
10
1
VGS = 0V _A
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
V_SD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
10μs
10
100μs
T_C = 25°C
T_J = 175°C
Single Pulse
1
1ms
10ms
A
1
10
100
V_DS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
www.irf.com
5